Design And Development Of Air Interface Monitoring And Target Acquisition And Recognition System Based On LTE-A

With the development of science and technology,the amount of information increases exponentially.In addition to face-to-face communication,more information is exchanged by communication networks.LTE-A(long term evolution advanced)system has developed into the mainstream of current mobile communication technology.The security of communication network has been paid more and more attention by the state.At present,network crime,communication fraud and other acts occur frequently,which makes the country pay a lot of human and material resources into the direction of security construction,so the demand for LTE-A communication system monitoring and capturing becomes very urgent.In order to meet the monitoring requirements of LTE-A communication network,this thesis studies the downlink LTE-A receive analysis link.Based on the current communication technology,the analysis method of LTE-A link that meets the actual project needs is designed through innovation.Through the receiving and processing of LTE-A communication signal of air port,the random access signaling between sensitive user and base station is monitored and identified,so as to capture the access identification of sensitive user and monitor the service data.In the process of engineering implementation,considering the natural advantages of FPGA and DSP in signal processing,FPGA + DSP architecture is adopted for hardware implementation.The main innovations and specific work of this thesis are as follows:1.Design a synchronization method and implement it with FPGA to meet the needs of the project of rapidly establishing downlink synchronization for four cells,and design corresponding synchronization tracking and frequency offset estimation methods to ensure the ability of data continuous analysis.2.In order to solve the working performance of the system in the low noise ratio environment,based on the LMMSE theory,the realization innovation is carried out,the method of LUT and HLS signal matrix sliding window multiplication is designed,and the two-dimensional LMMSE channel estimation algorithm is implemented with FPGA,which greatly saves the multiplier resources of FPGA,and ensures the operation performance of the platform in the low SNR environment.3.This thesis proposes a new PDCCH clustering blind detection algorithm to ensure that the PDCCH channel of the system can achieve the ability of real-time monitoring RNTI,and then improve the efficiency and capture ability of the system.4.The whole system is verified in the environment of 20 M system bandwidth and rssi-74.The verification contents include: data receiving of four cells,downlink connection with ENB,synchronous tracking,channel estimation and channel analysis.The system is simulated by Modelsim and tested on FPGA.According to the test data,the final performance of the system is analyzed.The average continuous resolution time of each cell after a single synchronous search is 4 hours,the correct resolution rate of PBCH is 100%,the correct resolution rate of SIB is 95%,the average acquisition probability of paging signaling is 94%,the average acquisition probability of MSG2 signaling is 90%,and the average acquisition probability of MSG4 signaling is 85%,which meets the project requirements of sensitive user acquisition.