Impact Of Different Gate Biases On Irradiation And Annealing Responses Of SiC MOSFET

Silicon carbide?SiC?has the advantages of high thermal conductivity,high electron mobility,high breakdown field strength and wide band gap.Devices made of SiC materials have great potential for anti-irradiation.At present,the preparation process of commercial SiC MOSFET is mature and has been put into use.Considering the application prospect of SiC MOSFET in aerospace and nuclear energy fields,it is important to study the effect of total dose effect on it.In this paper,the total dose test and the radiation annealing test were carried out using Cree SiC MOSFET.The specific work is as follows:1.Irradiation test was performed on the SiC MOSFET and the radiation-resistant Si MOSFET.The radiation source was ⁶⁰Co and the cumulative total dose was 150krad.Before and after irradiation,the electrical parameters of the device were measured to analyze the mechanism of radiation damage of the device.After irradiation,the threshold voltages of the two types of devices drift to the negative side.No significant change has been found in breakdown voltage and on-resistance.Leakage current of Si MOSFET show a significant increase and that of SiC MOSFET has no significant change.2.For the SiC MOSFET,the total dose test was performed under different gate voltage biases.The cumulative total dose is 1300krad and the gate voltage bias is 12V,16V,20V,22V,24V.Devices with a gate voltage bias of 12V were taken out for testing at cumulative doses of 300krad,600krad,900krad,1100krad,1300krad,and the data showed that the negative drift of the threshold voltage of the device continued to increase during the irradiation process.The gate voltage bias test shows that the threshold voltage of SiC MOSFET decreases with the increase of gate voltage in the range of 12V to 20V gate voltage bias.In the range of 20V to 24V gate voltage bias,the threshold voltage degradation increases with the gate voltage.The trapped charge concentration and interface trap charge concentration induced by irradiation were calculated by the simplified medium-band voltage method.The reasons for the threshold drift caused by the threshold degradation and high gate bias after irradiation were studied in detail.3.The high temperature annealing test and high electric field annealing test of the SiC MOSFET after the total dose test were carried out to study the mechanism of the device performance annealing recovery.The high temperature annealing test temperature is 150°C,and the gate voltage bias is 0 V and 12 V,respectively.After264 hours of 12V gate bias bias annealing,the device threshold voltage is substantially restored to the level before irradiation and the threshold voltage recovery is less under the 0V gate voltage bias.The high electric field annealing test uses 32V,34V,36V,38V,40V,42V gate voltage biases at room temperature according to the tunneling voltage range of the device and 36V,40V gate voltage bias at 175°C.Compared to high temperature annealing recovery,the time required for high electric field annealing recovery is greatly reduced and the threshold voltage degradation can be recovered within a few minutes.4.To ensure that the gate oxide layer is not damaged during the high electric field annealing process,the reliability of the oxide layer under the high electric field is tested.The time-breaking characteristic lifetime of the gate oxide layer is statistically analyzed by the Weibull distribution.The breakdown time of the oxide layer under different field strengths is evaluated by the time-lapse breakdown model,which is required to recover from the annealing of the high electric field.The test results show that it is feasible to select a reasonable gate voltage for high electric field annealing to achieve the recovery of threshold voltage degradation of the device.