FPGA Design And Implementation Of TTE Switch

With the continuous development of industrialization 4.0,the industrial information transmission network starts to develop in the direction of real-time,deterministic and fault-tolerant.With the increasing requirements of these performance indicators,the traditional industrial communication protocols are less and less satisfying.The researchers put forward the concept of time trigger Ethernet(TTE),will make a improvement of the traditional Ethernet,add time trigger function,make the whole system can realize the unification of the time benchmark network,on the basis of time synchronization in accordance with the time schedule table to scheduling to send and receive information and normal data information are triggered by an event time to transfer function.Existing three mainstream NTP,IEEE1588 and AS6802 TTE network,this paper made study compared to them,analyzed their respective advantages and disadvantages and applicable direction,think AS6802 agreement has relatively higher performance and wide application range,in domestic has the very big development space,so this paper decided to AS6802 protocol implementation and application as the research direction.In the process of studying AS6802 protocol,this paper constructs the switch hardware logic that conforms to the protocol requirements,and preliminarily constructs the device system that realizes the scheduling and forwarding of time trigger information.In this paper,a precompression method of control frame is discussed,which is suitable for practical application.This paper discusses a three plane switching switch architecture,which makes the improved logic more portable on the common switch,and reduces the time jitter and uncertainty of time trigger information.A dispatch and receive method suitable for TTE switch port is discussed,which can measure link delay by hardware logic instead of software logic,reduce the complexity of software and improve the accuracy of time.The design and implementation of this paper is divided into three parts: one is the logical realization of time synchronization function in accordance with AS6802 protocol;Second,the logic realization of high precision time trigger function;The third is the logic realization of multi-plane switching function.In this paper,FPGA which is easy to design and implement is used for logic implementation,and Vivado tool of Xilinx company is used for software tool.