Implementation Of FPGA-based Image Defogging Algorithm

Image information is an important source of information in our study and work.In fog conditions,due to the scattering of light by suspended particles in the air,the image contrast captured by outdoor imaging equipment is low and the image information is not clear,which causes great inconvenience to people who need to learn and work based on image information.In this paper,we plan to use FPGA to implement image defogging algorithm to solve this problem.In this paper,the cyclone IV series development board of Altera company is selected to design an adaptive histogram equalization algorithm with limited contrast.By using the parallel processing and pipeline processing ability of FPGA,the algorithm speed is improved in hardware.The design uses Verilog HDL language,Quartus II and Modelsim software for design and simulation,and signal tap II is used to verify the design.The image is collected by CMOS camera and transmitted to FPGA for algorithm processing.Finally,the processed image is displayed on the display screen in VGA format.After verification,the image defogging algorithm based on FPGA is designed and implemented,which can process the image with resolution of 640 * 480,the frame rate of processing is 60 frames / s,with real-time performance.The processed image can be displayed clearly and stably,and the color and spatial sense are more obvious.The average value,information entropy and average gradient of the processed image are improved obviously,and the effect of defogging is good.