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New control strategies for AC-DC converters with power factor correction

Posted on:2006-02-02Degree:Ph.DType:Thesis
University:Queen's University at Kingston (Canada)Candidate:Zhang, WanfengFull Text:PDF
GTID:2452390008964992Subject:Engineering
Abstract/Summary:
The bottleneck of digital control for power factor correction (PFC) implementations is mainly due to three aspects: high calculation requirements, high cost and limited switching frequency compared with analog implementations. The research motivation of this thesis is to explore new digital control strategies for power factor correction (PFC) in order to achieve higher switching frequency with lower cost, lower calculation requirement and better performance than the conventional PFC control methods. Three new PFC control strategies that are suitable for digital implementations are proposed in this thesis.; The first new control strategy for digital control PFC implementations is based on the optimization algorithm-gradient descent. Based on this digital control PFC strategy, the duty cycles required to achieve unity power factor in half-line period are calculated in advance as an aggregate by using the gradient descent algorithm. Total Harmonic Distortion (THD) is determined as the objective function because the lower the THD, the higher the power factor. Simulation results verify the feasibility of the proposed PFC control strategy based on the optimization algorithm.; The new digital PFC control strategy based on a predictive algorithm in a half-line period is proposed secondly. The predictive algorithm derived from the Boost topology generates the duty cycles required to achieve unity power factor in a half-line period based on the output voltage, input voltage and reference current. Test results of a DSP implementation show that the proposed predictive PFC control strategy can achieve unity power factor in both steady state and transient state.; The duty cycle parallel control strategy for Boost PFC implementations is proposed thirdly. The duty cycle is determined based on the input voltage, reference output voltage, inductor current and reference current. Compared with the conventional average current mode control, which had dominated the PFC implementations for the last twenty years, the proposed duty cycle parallel control strategy provides a better option for analog and digital control PFC implementations. The proposed duty cycle parallel control strategy has great potential in next generation of high switching frequency PFC implementations, due to its lower calculation requirement, lower cost and better performance than average current mode control.
Keywords/Search Tags:PFC, Power factor, Control strategies, Duty cycle parallel control strategy, New, Switching frequency, Calculation, Lower
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