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Utilizing an FPGA in conjunction with a DSP processor to facilitate the implementation of induction motor control

Posted on:1998-11-20Degree:M.SType:Thesis
University:Michigan State UniversityCandidate:Kelly, John WilliamFull Text:PDF
GTID:2462390014978145Subject:Engineering
Abstract/Summary:
The digital control program of an induction motor can be separated into two distinct components, the actual control program and the pulse width modulation (PWM) program. The control program is feedback dependent and sequential in nature, while the PWM program does not depend on feedback and is memoryless. This thesis explores the feasibility of implementing the PWM program on dedicated hardware, functioning in parallel to the control processor. The intention is decreasing the overall computation time. However, it was determined that only a partial PWM dedicated program was needed to improve overall processing time. The other part of the PWM program was implemented on a DSP processor. The DSP processor was also responsible for an indirect rotor flux field orientation control program, which regulated the speed of a 1/12 horsepower induction motor. Experimental results show this type of hardware parallelism decreases computation time, resulting in greater inverter switching frequency.
Keywords/Search Tags:Induction motor, DSP processor, Program
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