Bridging fault diagnosis in CMOS circuits

This thesis presents two new algorithms for diagnosing gate-level bridging faults in CMOS circuits. One algorithm uses the single fault assumption, while the other algorithm is applicable to circuits containing multiple faults. The new single fault algorithm provides a significantly higher diagnostic resolution than that provided by a well-known algorithm described by Chakravarty.;A set of design recommendations is given which improves the ;Extensive computer simulations are performed to illustrate the merits and feasibility of the new algorithms using Berkeley and ISCAS85 benchmark circuits.