Mixed analog/digital structures for high-speed A/D conversion and signal processing

High-speed analog-to-digital (A/D) conversion can be achieved by employing a parallel array of M A/D converters interleaved in time, each working at a speed (1/M)-th of the sampling rate. Although the resolution of the whole structure is theoretically given by the resolution of the A/D converters in the array, mismatches among these A/D converters lead to a decrease in the resolution. One of the objectives of this dissertation is to evaluate the number of bits of resolution lost due to these mismatches.;A new scheme for A/D conversion capable of attaining high speed using an array of lower speed A/D converters is introduced. Its basic idea consists of decomposing the incoming analog signal into several contiguous frequency bands so that a specific coding strategy can be assigned to each band signal. The structure uses a quadrature mirror filter (QMF) bank, except here the analysis filter bank is switched-capacitor (SC) circuit, whereas the synthesis bank is a digital filter circuit.;Coefficient inaccuracy effects in the frequency response of FIR SC filters implemented in direct form are investigated. A probability distribution function is derived for the error in the frequency response, and an upper bound for the expected stopband attenuation is derived. The results of this study are then used to design the analysis filter bank taking into account the coefficient inaccuracies.;Theoretical and practical issues which are important for the monolithic implementation of the above QMF bank based A/D converters are considered. In particular, a design method for the synthesis of SC circuits suitable for high-frequency operations is proposed. Emphasis is on the use of simple single-stage operational amplifiers with moderate dc gain, but with very high bandwidth. The noise power generated by the SC circuits is estimated and compared to the quantization noise power generated by the subconverters.;Finally, new structures for the digital processing of analog signals for high-speed applications are proposed. The structures presented here are suitable for the monolithic implementation of digital signal processors including on-chip A/D and D/A converters. With these structures, an input analog signal is simultaneously converted into digital form and digitally processed. This approach allows for the digital processing to achieve a higher speed while taking up lower total silicon area when compared to the conventional scheme, where the input analog signal is first converted into digital form, and then digitally processed.