Radiation induced single event transient (SET) effects in bulk and SOI FinFETs and robustness comparison with bulk CMOS

This paper presents a circuit based analysis of radiation induced Single Event Transient effects in FinFETs. After the initial discussion about how FinFET works and their charge generation and collection mechanisms when high energy particle hits it's sensitive region, the subject matter focused on the critical charge requirement to cause a single event upset (SEU) in nanoscale FinFETs. The procedure that was followed in this work included finding the node capacitance of the struck node which in terms, will lead us to critical charge requirement of that particular device. It is to notify here that critical charge is a device's intrinsic characteristics. But here as the node capacitance depends on circuit configuration, it is safe to say that the investigated critical charge presented in this paper also depends upon circuit configuration. So this critical charge is the charge required for a particular transistor (both FinFET and CMOS) based circuit to malfunction under radiation condition. A comparative study about the radiation robustness of SOI FinFET and Bulk CMOS is also presented here. And finally, single event transient performance in terms of fin geometry was explored.