| In recent years,breakthroughs have been made in China’s satellite projects of real-time cloud detection and image interpretation.However,the existing satellite in-orbit processing system is centered on hardware with fixed algorithms,which is difficult to design,poor in versatility and difficult to upgrade functions,and cannot meet the growing demand of military and civilian satellite detection in China.Implementing a high-performance and configurable processor is the best way to solve the satellite image cloud detection job.However,the current mature commercial instruction set architecture has problems such as technology blocking and complex extension design,making it difficult to customize instruction set architecture on areas such as on-star cloud detection application scenarios.In order to solve these problems,this thesis is based on RISC-V open source instruction set architecture and selects the U-Net image segmentation algorithm as the cloud detection algorithm,optimizes the existing XD RISC-V processor’ s floating point pipeline data path,completes the custom design of cloud inspection instruction,coprocessor hardware acceleration function and cloud detection software function,and finally carries out the experiment verification and performance test to realize the efficient operation of cloud detection on the satellite.By analyzing traditional satellite image cloud detection algorithm and U-Net neural network algorithm,it is concluded that the U-Net cloud detection algorithm has better universality and accuracy for remote sensing images with arbitrary background.Therefore,this thesis proposes a scheme to implement U-Net network in RISC-V processor and realize hardware acceleration.By building and training the U-Net network and passing the parameters to the memory unit of the processor,the satellite image processing cloud detection function is implemented on XD RISC-V processor using software programming.Analyzes the performance and resource consumption problems of U-Net algorithm implementation on the processor,adopts the technique of data bypass propagation to solve the problem of floating-point pipeline data conflict in the processor,and custom-designed RISC-V cloud detection instructions and coprocessor architecture to realize the hardware acceleration functions of coprocessor such as weight and bias parameter loading,image data preprocessing,convolution operation,etc.Finally,custom API functions based on the custom RISC-V cloud detection instructions and coprocessor functions to realize the fast invocation of coprocessor.In this thesis,the design implementation is verified through software programming simulation and FPGA board-level testing: the processor and coprocessor designs are simulated and verified functionally,and 5000 images of GF-1 remote sensing satellite are randomly selected for board-level testing of the cloud detection algorithm design implementation,and the results of the test are consistent with the comparison of the server results,and the performance basically meets the index requirements.Meanwhile,in the board-level test,through the coprocessor hardware acceleration design,the efficiency of floating-point operations in the U-Net algorithm is improved to 22.91 times of the original processor implementation,and the storage space consumed is reduced to 31.73% of the storage space consumed by the original processor.After the circuit synthesis and formality check,it basically meets the index performance requirements of the on-star implementation of cloud detection,and is finally delivered to the flowing chip. |