Research And Design Of Negative Voltage LDO Circuit Applied To Image Sensor

As integrated circuit process dimension becomes smaller and smaller,integrated circuits have developed rapidly from a single function to more and more complex functions.LDO used in image sensors have the advantages of simple structure,fast transient response speed,low cost,etc.,and have more extensive applications.Therefore,it is extremely important to study high-performance negative voltage LDO circuits.Design and implement the negative voltage LDO circuit applied to the image sensor.The clock signal and the enable signal are combined with an inverter and a NAND gate in the digital module to generate two non-overlapping clock signals.Using the generated two non-overlapping clock signals as the clock signal input in the charge pump circuit.A low-ripple,high-efficiency,high-driving charge pump circuit with an inverted output voltage is designed,and this voltage is used as the negative power supply in the LDO circuit.Adding a PTAT current source to the bandgap reference circuit,provides a μA level of bias current for the LDO circuit.The relationship between performance specifications and design specifications of LDO circuit is analyed comprehensively,and the zero-pole tracking compensation method of controlled resistance generation circuit is adopted to determine the different load current of 0～50mA in the LDO circuit.At the same time,the transfer function of power supply rejection in the LDO circuit is analyzed.Comparing the PSRR of the LDO structure with the compensation capacitor placed between the source and output nodes of the cascode device and Miller compensation.Finally,the specific LDO circuit design results are given,and the integration of the circuit is optimized.Based on the DB Hitek 0.11um 1.5V/3.3V PDK process,Cadence Virtuoso tools are used to complete the circuit transistor-level design,pre-imitation,and physical layout design.Under the conditions of room temperature,standard process angle,power supply voltage of 1.2V,and load capacitance CL of 1uF,circuit design and simulation analysis are performed.The charge pump simulation results show that the current drive capability is 0.1 A and the output voltage is-1.17415 V.The average value of the current is calculated in the stable phase.When SW=0,Ipower=25.48E-3A,Iout=50mA,and the conversion efficiency is 91%.When SW=1,Ipower=52.03E-3A,Iout=50mA,the conversion efficiency is calculated to be 91.8%.Finally,the inverting voltage output of the charge pump with high driving capability,low ripple and high efficiency is realized.Negative voltage LDO circuit with zero-pole tracking compensation method generated by controlled resistance.Under the load change of 0mA to 50mA,the output voltage of the LDO circuit is simulated under light load and heavy load.The DC voltage is scanned at-40℃to 85℃ to observe the output voltage.During this process,the output voltage is basically maintained at-1V,the maximum and minimum difference is 923.5uV.The maximum and minimum difference is 923.5uV.In this circuit,the pole-zero tracking compensation method of the controlled resistor generating circuit is adopted.The circuit gain is 61.92dB and the phase margin is 89.13deg when the load current is 0mA.When the load current is 50mA,the gain is 60.097dB,and the phase margin is 74:47Deg.The load regulation rate in the LDO circuit is 0.052mV/mA.When the load current at the output end is I=0A and I=50mA,the linear regulation rate in the LDO circuit is Line Regulation| I=OA=2.898818mV/200.4255mV≈0.01446,Line Regulation|I=50mA=3.0591mV/174mV≈0.0176.During the transient response,the load current in the circuit changes in steps of 0-50mA.The transient response time is about 14.76us during overshoot,and the overshoot voltage is 1.594mV.The response time when undershooting is about 13.709us,and the undershoot voltage is 2.611 mV.Using power ripple suppression to improve the circuit under different load currents.In the low frequency band,the minimum power supply ripple suppression is 80.1151dB,and in the middle frequency band,the minimum power supply ripple suppression is 49.723 dB.The results show that the negative voltage LDO circuit applied to the image sensor d fully meets the design performance indicators and functional requirements,and has the characteristics of fast transient response and high performance.