Font Size: a A A

Research And Design Of Ultra-low Power And Wide Input Range LDO

Posted on:2022-07-03Degree:MasterType:Thesis
Country:ChinaCandidate:J ZhuFull Text:PDF
GTID:2492306524477544Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
With the increase in the application fields of switching power supplies and the rapid development of corresponding technologies,the input voltage range of switching power supplies has increased significantly.The current supply voltage of the latest automotive electronic systems is as high as 48 V.Secondly,the rapid increase in chip energy consumption is in contradiction with the slow development of battery technology,Limiting the application potential of many electronic devices.In view of the above problems,this paper studies and designs an ultra-low power,wide input range LDO.This thesis first briefly describes the working principle of the LDO,and then studies and analyzes the loop stability and fast transient response of the low quiescent current LDO.Based on the application scenarios of high power supply voltage such as automotive electronics,this paper designs a pre-biased LDO circuit that converts a wide range of input voltage to a relatively stable internal low-voltage power supply,thereby meeting the design requirements of high performance and low power consumption.In the low quiescent current LDO,limited by the tail current of the error amplifier,the output pole of the error amplifier cannot be pushed to high frequency,and the output pole varies with the load current in a very wide range.In this paper,the zero-pole tracking compensation network is designed to reduce the error amplifier.The phase margin at the output is attenuated,and a dynamic zero compensation circuit is designed at the output pole to achieve load current tracking and load capacitance tracking.The stability of the circuit can also be guaranteed under full load and wide output capacitance range;tail current limit band Another problem that comes is that the slew rate of the error amplifier is reduced,and the transient response becomes worse.This paper designs a transient response enhancement circuit based on dynamic current bias.The circuit does not go through the error amplifier main loop and directly outputs to the error amplifier.Charge and discharge the terminal,effectively improving the transient response capability.In order to improve the reliability of the LDO chip,a soft-start circuit is designed to avoid the surge current during the startup process and the internal modules of the chip are turned on by mistake.At the same time,the chip has integrated under-voltage,over-temperature,and over-current protection circuits.In some cases,the main power tube leaks seriously when the process is at a high temperature,and a high-temperature current discharge circuit is designed to ensure that the LDO can work normally when there is no load.Based on the 0.18(?)m BCD process,this paper designs an ultra-low-power,wideinput range LDO,and uses spectre simulation software to simulate and verify the designed sub-module and the overall LDO system.The input voltage range is 3.6V-40 V,the output voltage is fixed 3.3V and 5V,the output load capacitance range is 1(?)F-200(?)F,and the quiescent current under light load is only 4.6(?)A.The linear adjustment rate is0.011 m V/V,the load adjustment rate is 0.045 m V/m A,the low-frequency power supply rejection ratio reaches 102 d B,and the load current jumps between 1m A and 100 m A,the undershoot voltage is 331 m V,and the overshoot voltage is 221 m V.
Keywords/Search Tags:LDO, ultra-low power, wide input range, dynamic zero compensation, soft start
PDF Full Text Request
Related items