The Research On Technology Of Simulation On Signal And Power Integrity Of DDR Bus

With the development of Double Data Rate Synchronous Dynamic Random-Access Memory(DDR),the bus data rate is doubled,and the working voltage is gradually reduced.Signal integrity and power integrity(SIPI)problems are becoming more and more prominent.As a efficient system-level performance verification method,the traditional SIPI simulation method is to divide the problem into two parts,signal integrity and power integrity.It is time-consuming and easy to cause over-design problems.The power-aware signal integrity simulation proposed in recent years is a preliminary SIPI joint simulation methodology,but the simulation accuracy can not meet the requirements gradually.At the same time,in all of simulation of SIPI,the excitation code used are conventional types,such as the random code,the pseudo-random binary sequence(PRBS)and square waves.Without the research of excitation code used in SIPI simulation,the worst working condition of the system can not be verified.Therefore,this paper focuses on the research and improvement of the simulation system and the excitation of the SIPI joint simulation.The Plus version of Input/Output Buffer Information Specification(IBIS)is used to improve the power-aware SIPI simulation system environment on the modeling of jitter element.A more accurate simulation environment for DDR bus system is built.Based on the theory of Simultaneous Switching Noise,the relationship between system simulation excitation and power supply noise is studied.Based on the theory of SSN and signal integrity,the concept of worst-case incentive is proposed.Using PRBS code and gating square wave,the worst-case excitation considering both the noise of power network and the non-ideal effect of signal network is generated.In the verification on accuracy of different single I/O models,the conclusion is drawn.Based on accuracy of SPICE model,the accuracy of IBIS Plus model is improved by 5% in eye height,6% in eye width and 65% in jitter simulation than IBIS 5.0 model.IBIS Plus model is more suitable for SIPI joint simulation of current accuracy requirements.In the aspect of power supply noise,it is concluded that the excitation frequency of maximum power supply network noise is close to the impedance resonance frequency of power supply network,which is slightly lower than the impedance resonance frequency.The specific frequency depends on the different circuit design.In this paper,the peak-to-peak voltage of power supply noise generated by square wave excitation of power network impedance resonance frequency is 205 m V,which is the maximum value of power supply noise among the experimental sample.In terms of worst-case excitation,compared with PRBS code excitation,the worst-case excitation generated in this paper reduce the eye width by4.7%(16.33 ps)and the eye height by 19.9%(104 m V)in the output eye diagram of the bus system,which can better reflect the extreme working environment of the system and improve the simulation accuracy of the system SIPI.