Dynamic Performance Optimization Of High Frequency Inverter Based On SiC MOSFET

Auxiliary converter is one of the most important electrical components of subway vehicles.With the commercial application of SiC devices,the lightweight of auxiliary converter is expected to be greatly improved.In this paper,the dynamic performance optimization technology of SiC devices applied to on-board converters is studied in depth,focusing on the driving parameter selection strategy based on the lowest loss point and the design technology of the power loop with low parasitic inductance.The theoretical research results are verified through a large number of simulations and experiments.The switching transient model considering the influence of parasitic parameters was established,and the analytical expressions of electrical stress and switching loss of SiC MOSFET during switching transient were derived.The mechanism of driving parameters on switching behavior was analyzed in detail by combining theoretical qualitative analysis and simulation quantitative analysis.Aiming at the constraint problem between electrical stress and switching loss under the adjustment of driving parameters,a driving parameter selection strategy based on the lowest loss point was proposed.Through the coordination and matching of driving parameters,the switching loss could be minimized under the premise of maintaining the constant electrical stress.A driving parameter selection strategy considering temperature compensation was proposed for the different effects of temperature on the turn-on and turn-off processes.Reliable evaluation of parasitic inductance is the premise of optimal design.In this paper,an evaluation model of parasitic inductance in power loop is proposed from the mathematical point of view.The error between the model and the experimental measurement is less than 1%.Aiming at the problems that traditional design methods rely on experience and high design cost,the analytical model of irregular structure busbar based on spatial geometry parameters and the design method of stacked busbar based on multi-constraint conditions are proposed.The influence of the selection and layout of the absorbing capacitor on the loop inductance is analyzed,and a multi-degree of freedom(DOF)design method of the absorbing capacitor is proposed considering the capacity value,quantity,parasitic inductance and device characteristics,which realizes the full absorption of the stray inductance of the external circuit and nearly zero introduction of the parasitic inductance.The test circuit was built in Simplorer and ANSYS Q3 D simulation platform,and the auxiliary inverter prototype based on SiC MOSFET was completed.The feasibility and effectiveness of the above key technologies were verified by co-simulation,double pulse test and power experiment.80 figures,23 tables,67 references.