Design Of UWB Self Calibration PLL Frequency Synthesizer For Vehicle Positioning

With the advent of the era of intelligent vehicles,vehicle positioning is of great significance for automatic driving route planning and vehicle collision warning.The positioning technology based on ultra wideband(UWB)communication has attracted more and more attention due to its centimeter level spatial positioning ability.In the UWB communication system,the frequency synthesizer,which is used to provide accurate LO signal,is one of the most complex and key modules.Meanwhile,the complex and harsh vehicle environment puts forward more stringent requirements on the noise performance and reliability of the frequency synthesizer.Focusing on the application of UWB radio frequency communication in vehicle positioning,this paper designs and implements a PLL Frequency Synthesizer based on low noise ring VCO and high-precision automatic frequency calibration technology.First of all,in order to solve the problem of stability caused by loop parameter fluctuation under broadband,a simple and reliable fourth-order loop parameter design method is proposed by formula derivation and root locus diagram.Then,in order to improve the noise performance,in the design of key modules:In order to reduce the VCO phase noise,based on the derivation and analysis of the VCO phase noise model,a dual tuned dual channel ring VCO structure is proposed,which reduces the tuning gain and obtains a higher oscillation frequency with less noise cost.In order to reduce the reference spurs,a source switched charge pump structure with negative feedback is designed,which uses both PMOS and NMOS reference branches.In order to reduce the fractional spurs,aΣ-Δmodulator with MASH 1-1-1 structure is designed to realize the randomization of the modulator output and the quantization noise shaping.Finally,in order to ensure the reliability in the vehicle environment,a high precision automatic frequency calibration scheme with secondary calibration is proposed.High precision and secondary calibration make the frequency synthesizer still lock to the correct frequency band in the worst case of PVT.In this paper,based on the SMIC 180nm CMOS process,the design of circuit,layout and post-simulation analysis of PLL frequency synthesizer are completed.The simulation results show that it can output 3.1-4.8GHz signal in the worst case of PVT,the minimum frequency step is about 380Hz,the in-band phase noise is about-74d Bc/Hz,and the out-of-band phase noise is about-104d Bc/Hz@1MHz,the spurs are lower than-65d Bc,the overall power consumption of the system is about 18m W,the overall layout area is only 0.17mm~2.It meets the requirements of vehicle UWB communication with low noise and high reliability,and achieves the expected design goal.