Design And Implementation Of Time Sequence Logic For Missile-borne Distributed Coherent Synthetic Radar Experimental System

Facing the increasingly mature anti-missile defense technology,the single seeker penetration strategy will not be able to adapt to the complex battlefield environment in the future,and multi-ballistic group coordinated operations will be the mainstream mode of the future.Distributed coherent synthetic radar has the advantages of high detection power and strong maneuverability.The distributed coherent synthesis technology is applied to the seeker,and the seeker flying in the air constitutes a missile-borne distributed coherent synthesis system.Multiple seekers cooperate in combat,which will greatly increase the seeker’s terminal guidance distance and anti-interference and anti-destroy ability.Aiming at the missile-borne distributed project,this thesis further supplements and improves the functions of the missileborne distributed coherent synthesis radar experimental system.It mainly studies the signal generation and timing logic design and implementation of the missile-borne distributed coherent synthetic radar experimental system,and carries out joint debugging and measurement analysis of the experimental system.The work of this thesis is as follows:1.The basic principle and signal model of missile-borne distributed coherent synthetic radar are summarized.Then the experimental system test scheme and work flow are discussed emphatically.The test scheme mainly includes the infield line-fed mode and the infield airfed mode.Then there is an introduction to the software and hardware platform of the experimental system.The hardware platform is divided into DA signal generation board,AD signal acquisition board,signal processing board,optical fiber data transfer board,PCIe data transmission board according to functions and the FPGA logic function of each board is introduced in detail.The software platform is mainly the display and control software of the upper computer.2.The logic design and implementation of the echo signal received by the seeker of the experimental system are completed.According to the test scheme,the overall scheme of the signal generation module of the experimental system is studied.The high-speed data stream transmission interface of the experimental system was debugged online,and the data transmission module of each part was designed to verify the accuracy of high-speed data stream transmission.The logic design of the large-capacity echo data cache module has been completed under the condition of reliable data transmission,and the cache effect of up to2 GB data is achieved.Finally,according to the timing of the experimental system,the logic design and implementation of the echo signal generation module has been completed,and the correctness of the signal generation of the experimental system is verified through the overall experiment.3.According to the experimental system test scheme,the experimental system workflow is divided into four working phases,which are parameter setting phase,echo data loading phase,coherence-on-receiving mode phase,and AD original data data return phase.The overall working sequence of the experimental system is designed.Then the main content and workflow of each working stage are introduced in detail,the sequential logic design of each stage is completed,and the correctness of the sequential logic design of the experimental system is verified through simulation or online debugging.4.The overall joint debugging and actual measurement data processing on the missile-borne distributed coherent synthetic radar experimental system is carried out.The result of joint debugging and actual measurement verifies the validity and real-time performance of the coherent synthesis algorithm of the experimental system under the infield line-fed mode.