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Research And Implementation In Wear Leveling Systems For Non-volatile FPGA

Posted on:2022-05-10Degree:MasterType:Thesis
Country:ChinaCandidate:Y J ZhuFull Text:PDF
GTID:2492306608481184Subject:Automation Technology
Abstract/Summary:PDF Full Text Request
With the development of social economy,the car has become indispensable traffic tool in people’s daily life,but with the increasing awareness of environmental protection,people gradually realize that the cars bring convenience but also pollute our survival environment at the same time,and people have to face the current situation of the increasingly shortage of oil resources.Due to the above environmental and resource problems,new energy vehicles such as trams have come into the public’s sight and gained a high level of attention.More and more people begin to favor trams because they are more environmentally friendly and energy-saving,so the development prospect of trams is brighter.The most core part of tram is power source--battery.It is of great significance for battery maintenance and related charge and discharge operation to master the relevant data of battery in real time.Currently existing battery management system can only realize the single-channel information collection and the control of charge and discharge,efficiency is lower,the utilization of existing hardware resource is lower,which does not meet the requirements of high efficiency and high resource utilization in industrial production.Secondly it cannot be applied to multi-type data collection equipments.The poor pervasiveness does not meet the needs of supporting multi-type collections devices.Finally,because of the defects of the system in internal design,the loss of testing data has occurred in the process of experiment.In order to solve the above problems,this paper proposes a multi-channel battery pack management platform based on the single-channel system to realize the demands of multi-channel parallelization for data transmission and control,so as to improve the efficiency of data processing and the utilization of on-board resources.At the same time,different data collection schemes are developed for different types of data collection equipments,so that the platform can support three different types of data collection equipments to independently carry out data collection and transmission.At last,the problem of data loss in the testing process was investigated in detail,and it was determined that the problem was caused by insufficient data cache space and too fast frequency of data update.According to these results,the platform was updated and optimized.This paper selects Xilinx series 7000 development board ZedBoard(ARM+FPGA)as the experimental platform because of its high parallelism and low power consumption.Then we use existing hardware resources to build multi-channel architecture,and achieve function definition and implementation of software based on this architecture.Compared with the original architecture,the parallelism of the system is improved,the scope of application is expanded,and the defects of the original platform is improved.So the overall performance of the system has been larger promoted.This paper is consisted of three parts,namely,the architecture design of multichannel platform,the design of data transmission scheme and data collection scheme,and add the design of independence among channels and security mechanism according to the parallel characteristics of multi-channel platform.Firstly,based on the analysis of the original single-channel platform and the utilization of existing hardware resources,this paper designs a parallel architecture of four channels for each type of data colletion equipments,a total of 12 channels,under the premise of maximizing the utilization of existing resources.Secondly,based on this hardware architecture and the computing characteristics of heterogeneous SoC,this paper designs the data transmission scheme of multi-protocol clusters,realizes the functions of command down and data upload.The formats of data frame are modified for different types of data collection equipments,and different data collection schemes are summarized.Then,the independent design of channels is carried out to ensure that each channel does not interfere with others for data processing,and the design of safety mechanism is added to prevent users from damaging the battery performance by misoperation.Finally,the platform is tested for various functions,and the experimental results are analyzed and evaluated,time delay is optimized at the same time.In this paper,the existing single-channel battery management platform has been upgraded with optimized arcithecture and rich functions,which has higher application value.The parallel processing architecture proposed in this design can also be widely applied in other application scenarios with large amount of data computation and high complexity,so as to speed up data processing and improve performance of applications.
Keywords/Search Tags:Battery pack, Parallelization, Data collection amd transmission, FPGA, ARM
PDF Full Text Request
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