Design Of Multichannel Alternating Current Stimulator Based On FPGA

Transcranial Electrical Stimulation（TES）is a non-invasive stimulation technology that can affect the neural activity by using the weak current.Although we didn’t understand how it works,there were so many clinical experiments had proved that TES had the good effect on the treatment of brain diseases,especially neurological diseases.So,it has become a popular treatment for neurological disorders such as epilepsy,depression,insomnia and so on.In addition,in recent years,some researches have solved some problems of TES,like the depth of stimulation is too shallow or it can not be concentrated on one point.They use multichannel alternating current to stimulate the relevant brain region precisely and expands the applicability of non-invasive electrical stimulation.The device mentioned that there are three important parts in this thesis: upper computer,FPGA and peripheral circuit.The upper computer is based on QT which is a software can generate the UI and it can be compatible with a variety of equipment environment.So it’s convenient for users to configure parameters and equipment debugging.FPGA is the core component of the device,which can be connected with the upper computer through UART serial protocol to receive the output parameters set by the upper.It can generate 2-channel signal and each channel can set signal output independently.The frequency output range of single channel is 50～10KHz and the minimum controllable frequency is 1Hz.The maximum stimulation intensity is ±2mA and the minimum controllable amplitude is 0.1mA.The maximum of delay between the different channel is 10 min.The maximum duration is 1 hour.The maximum load of single channel is 5KΩ.And the output phase can be controlled.This thesis also focuses on using FPGA to realize real-time impedance detection in multi-channel stimulation.This method takes advantage of the characteristic that the equipment can output signals of different frequencies at the same time,and the real-time impedance can be calculated by the amplitudes of concerned frequency which are separated from the voltage signals collected by the analog-digital conversion circuit through FFT processing.The target of this device is to integrate functions or instructions into a single FPGA as far as possible,except the necessary peripheral circuits.The advantage of this design is to facilitate the subsequent improvement and upgrade of the peripheral circuit and improve the applicability.The necessary peripheral circuits mainly include the digital-to-analog conversion circuit,the analog-to-digital conversion circuit and voltage control current source circuit.FPGA will output the control voltage into the voltage control current source through the digital-toanalog conversion circuit and then outputs the current for current stimulation.After the stimulation current flows into the target,the analog-to-digital conversion circuit will collect the voltage signal of the set points and transmit them to FPGA for processing.Finally,the electrode impedance will be obtained and displayed on the upper computer.In the end of this thesis,it shows the result of testing about functions of some core modules to ensure their feasibility and stability.It mainly tests the communication between upper computer and hardware,some important IP’s functions in FPGA,the output and signal acquisition of peripheral circuit,and builds the experimental circuit to measure the value of real-time impedance detection at last.