| With the continuous update of semiconductor technology,the continuous development of application fields such as the Internet of Things,artificial intelligence and 5G communications,and the continuous complexity of electronic product functions,the maximum current capacity requirements of power management modules have also increased.For the most widely used Low Dropout Regulators(LDOs)in power management chips,the maximum current that can be provided by a single LDO chip is also limited due to chip package size and heat dissipation restrictions.The parallel solution of LDO is an effective way to solve this problem and improve the maximum current capability of the power system.However,simply adding an external control loop or additional devices to achieve parallel LDOs has problems such as reduced system stability,poor current sharing and is not conducive to integration in a system-on-chip.A high-performance,high-current,dual-phase parallel and automatic current sharing high-performance LDO chip is researched and designed in this paper.It features high power supply rejection ratio(PSRR),high accuracy,superior linear regulation,and load regulation.The innovations of this article are summarized as follows:(1)An external compensation method of nested current mode Miller doubling and external Miller capacitors is proposed.The nested structure reduces the chip size,and the compensation method does not generate zero points in the right half plane,which enhances reliability.It can maintain good stability in various application environments.(2)A low-voltage,high-precision,maintenance-free reference voltage source circuit is designed to improve the accuracy of the output voltage.By using a transistor as the input pair of the differential op amp,the mismatch of the op amp is minimized,so as to achieve a highprecision output reference voltage of ± 0.96%,and no additional trimming circuit is required,reducing the area occupied by the circuit.(3)A high-precision programmable current limit function module is designed.By selecting different PCL pin-to-ground resistances,the programmable function of the current limit value of the output current of the LDO chip is realized to meet the needs of different application scenarios.(4)A two-phase parallel LDO scheme that realizes automatic current sharing through current information exchange is designed to make the maximum output current reach 6A.The current difference between the two chips is fixed,so that the proportion of current flowing through the two LDOs is well balanced,the temperature difference between the parallel LDOs is reduced,and the safety and reliability of the system are improved.The circuit design and simulation verification were performed using TSMC0.18 um BCD process,and the layout design was finally completed.Simulation results show that the input voltage is 1.5V ～ 5V,the output voltage is 0.8V ～ VIN-0.35,the maximum output current is 3A,the output voltage accuracy is ±1.19%,the dropout voltage is less than 280.7m V,the maximum linear adjustment rate is 0.041% / V,and the maximum load adjustment rate is 0.00098% / V,the highest PSRR is 71 d B@1k HZ,and the current difference between the two LDO chips is 0.249 A when working in parallel. |
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