Research And Realization Of Low-altitude Detection Radar Signal Processing System Based On FPGA

Low-altitude detection radar is a radar whose main task is to detect and track low-altitude targets.Field editable gate array(FPGA)have been widely used in radar signal processing.Based on a low-altitude detection radar project,this paper studies a signal processing scheme for a dual-channel,wide-narrow composite pulse system radar,analyzes and simulates the algorithm,and completes the design and implementation of the signal processing algorithm on FPGA.Finally,the system debugging and field tests were completed.The main content of this article is divided into five parts.1.Radar structure,waveform and signal processing scheme design: This part first defines the radar performance parameters and working mode parameters,and designs the radar system structure.Since the radar needs to have both long-range and short-range detection capabilities,and the range-finding blind area is as small as possible.Therefore,an improved radar signal form,that is,a wide and narrow pulse composite signal,is used.Finally,a complete signal processing scheme is designed.2.Analysis and simulation of signal processing algorithms: This section first analyzes the bandpass sampling theorem,and then researches and analyzes the algorithms in signal processing based on the wide and narrow pulse composite signals used in this subject.The algorithms include digital down conversion(DDC),Pulse compression,MTD and sum-to-difference angle measurement,and a pulse compression distance gate splicing method is proposed based on the characteristics of wide and narrow pulse composite signals.The wide and narrow pulse composite signal processing flow is simulated by MATLAB.3.Hardware design: This section starts with the analysis of signal processing system requirements,discusses the hardware design of the radar signal processing system in detail,and after giving the overall architecture design of the signal processor,discusses the performance and configuration of the FPGA chip;Then designed the power supply module,clock module,DDR3 memory module,and ADC sampling module in turn;finally,the FPGA related interface design scheme is given.4.FPGA design and implementation: This section designs the implementation structure of the signal processing algorithm on the FPGA to ensure the real-time nature of the signal processing,and analyzes and verifies it through Model Sim simulation.This paper proposes its own optimization about the problems of resource reuse and data interception encountered in engineering design.5.System debugging and outfield test: This section is the debugging and external field test of radar signal processing system,describes the debugging method of each hardware module,and gives the debugging results.Debugging related interfaces separately to achieve normal communication;using the method of joint debugging of the simulator and the signal processor,the debugging of the signal processing system is completed;during the field test of the radar,Chip Scope was used to observe the detection of moving and static targets in real time.The paper has completed the design and implementation of a low-altitude detection radar signal processing system based on FPGA after solution design,theoretical research,hardware design,software programming,system debugging and field test.