Design Of Large Capacity STT MRAM Controller

With the rise of mobile terminals and the advent of the 5G era,the rise of smart driving,short videos,live broadcasts,games,etc.has led to more and more complex data streams,which puts more requirements on data storage,including data storage that needs to be read and written.The faster the speed,the lower the cost,the faster the response,the lower the power consumption,and the mobile terminal equipment has strict requirements on the area of the data storage unit.Previously a large number of commercially available memories such as static random access memory(SRAM),although the read speed is fast and low power consumption,have the disadvantages of high cost and large area;dynamic random access memory(DRAM),although low cost and high integration,But data is volatile and slow to read;flash memory(FLASH)has a fatal flaw in its low power consumption and low read speed.The new magnetic MRAM particles have the advantages of many other types of storage: multiple read and write operations,large capacity or even close to flash memory,fast read and write operations,and data can be saved even after power failure,and the area is small,Low power consumption and low cost.These advantages are in line with the data storage requirements of mobile devices.At present,my country’s new storage particles for magnetic random access memory(MRAM)have just started,and gradually have their own results.More mature MRAM storage particles have been developed based on the 28 nm process.However,the matching controller is still relatively scarce.In order to fill the gap in this part,this subject has designed a controller for the characteristics of MRAM particles.Based on the characteristics of MRAM particles,an internal controller that conforms to the LPDDR protocol is designed.Better play characteristics.For this reason,this subject has done the following work to realize this design:(1)I read a lot of literature about MRAM,studied the internal realization principle,development status and so on of MRAM.Compare the advantages and disadvantages of MRAM and other capacitive granular memory,analyze its future possibilities,and consider its future application scenarios.(2)Refer to the manuals of various companies on the LPDDR protocol,and combine the characteristics of MRAM to design an LPDDR controller suitable for MRAM particles,highlighting its characteristics.According to the overall design requirements,the overall controller frame and various circuit modules are designed.The main modules include the controller module,the interface circuit module and the MRAM array particle module.(3)The chip has been verified and simulated at the RTL level.By building a TEST BENCH platform to simulate the command from the upstream,the chip is operated,and its use scenarios are divided into test points,and verification and simulation are carried out under different circumstances.,Including storage function verification and timing verification,to ensure the correctness of the chip from different angles.