Research On Timing Control Circuit Of SRAM In 65 Nm Process

Recently,the fast progress of the IC industry,the scale of the IC market is growing,so the progress of the IC industry is of great importance,semiconductor memory as an important part of the IC market,but also for the progress of the IC industry,plays an important role.At the same time,the market share of SRAM also accounts for about one third of the memory market,so the research on SRAM is of great importance.Nowadays,with the popularity of mobile electronic products,the demand for low voltage,high storage capacity SRAM increases.Due to the reduction of VDD,the device size is continuously reduced,which has a great impact on the capability of SRAM,such as speed,power consumption and accuracy.To prioritization the performance of SRAM,this paper will study and analyze the timing circuit of SRAM sensitive amplifier and make some improvements.In view of this,this paper makes the following work:Firstly,this article studies the overall structure of SRAM circuit,referrals the basic operation of SRAM,and points out that the read operation path has a huge impact on the performance of SRAM by analyzing the read and write operation path of SRAM,in which the fluctuation of the timing circuit of sensitive amplifier is the key point of the read operation path optimization.Then the phase inverter chain technology and the traditional copy bit line technology are analyzed.Then the MRB,DRB,DRBD technology are studied and simulated,and the merit and demerit of the circuit are pointed out by comparing with the traditional technology.Design idea of this several copies a line technology analysis,and according to this line of thinking,the optimization design is put forward in this paper the double side double column type copies a water line technology,the technology compared with other technologies have better temporal fluctuations inhibition,at 0.7 V power supply voltage,SS process Angle,to 40℃ under the simulation environment,timing fluctuations was reduced by 71.96%.As the PVT parameter changes greatly,the average delay value and delay fluctuation of the SAE signal have large changes.To solve this problem,the programmable technology is used for preliminary exploration.The average delay value can be reduced by 42.29%,and the standard deviation can be reduced.51.89%,so that the circuit can generate a proper SAE signal within a larger parameter variation range.