| Image enhancement is an important part in the field of image processing;with the development of modern industrial technology,the complexity and real-time requirements of image enhancement algorithms are also increasing.Due to its serial processing characteristics,the traditional processor architecture is difficult to quickly perform a large number of complex operations for image pixels,resulting in the dissatisfaction of image enhancement algorithm’s real-time performance.Therefore,the ZYNQ heterogeneous platform of Xilinx is used,which has both the high parallelism of FPGA and the specificity of the ARM core and can perfectly fit the image enhancement processing algorithm.Also,the platform uses high-level synthesis tools to perform hardware acceleration optimization processing on the algorithm,which can better realize video enhancement.First of all,this paper studies the image detail enhancement algorithm,the purpose is to enhance the high-frequency components of the image,highlight the texture information of the image,and retain the low-frequency components of the smooth image to improve the visual effect of the image.However,traditional image detail enhancement algorithms cannot solve the contradiction of enhancing image texture details while removing image noise.The fractional differential image enhancement algorithm takes advantage of the weak derivative property of the fractional differential,which can achieve the non-linear preservation of smooth areas in the image while highlighting the texture details.And introduced the classical fractional differential operator Tiansi operator,which has better differential characteristics than integer differential operator.In view of the limitation that the Tiansi operator treats the texture area as a smooth area at individual pixels and cannot achieve the enhancement effect,the research team proposed an improved Tiansi operator and constructed a fractional order model based on the quadratic function.It saves the time of manually searching for the best fractional order,and is universal and adaptable.Based on this algorithm,the hardware acceleration design of video enhancement algorithms is studied.Secondly,a video detail enhancement system is designed based on ZYNQ.The video image input is generated by the TW6874 SDI video image decoding chip,and the HD-SDI BT.1120 16 bit mode is selected.A line-effective data buffer mode is designed on the ZYNQ platform,which uses AXI4-Stream Data FIFO to buffer one line of valid data and generate the handshake signal required by AXI DMA.Baesd on the Software and hardware collaborative design ideas of ZYNQ,the video image collection,format conversion,convolution acceleration processing and video image data output display of the video enhancement transmission system are allocated to the PL part of ZYNQ for processing,in which the convolution operation of the video image is very suitable to be processed by PL with high parallel computing.The feature extraction part of the video enhancement algorithm and the DMA control video image buffer to the DDR3 SDRAM part are allocated to the PS for processing,and the feature extraction algorithm that requires floating-point calculation is very suitable for PS side processing.Afterwards,the structure of the adaptive fractional differential video detail enhancement algorithm is analyzed,and hardware acceleration is determined for video image convolution.After detailed analysis,an appropriate granularity processing method and storage structure are obtained.The optimization instructions in the high-level synthesis tool are used to accelerate the optimization of the algorithm convolution operation,including loops and arrays in the algorithm,and finally increase the data throughput of the convolution operation to achieve hardware acceleration.Finally,the experimental equipment is briefly introduced.The HLS simulation and theoretical simulation experiments are carried out using the adaptive fractional differential detail enhancement algorithm.The results are compared through the SSIM similarity index to verify the accuracy of the algorithm,and the results are greatly improved compared to the processing speed of the CPU.The optimized acceleration instructions of HLS and the utilization of resources after optimization were tested.As a result,the algorithm after HLS optimized instructions met the real-time requirements.The overall video enhancement effect was tested,and the results showed that video detail enhancement can be achieved. |