Research And FPGA Realization Of PDCCH In 5G UE Simulator

It is in the transition period from 5G(5th-Generation)mobile communication construction to large-scale commercial use,the 5G terminal emulator is a test instrument for the 5G terminal and has strong analytical capabilities and can completely verifies 5G link and protocols.The function realization of 5G terminal emulator requires the support of the physical layer.As the core control part of the physical layer,how to quickly get the DCI(Downlink Control Information)in the PDCCH(Physical Downlink Control Channel)is a difficulty in realization of the 5G terminal simulator.This thesis carries out theoretical research and engineering realization of PDCCH link based on the actual needs of terminal simulator.The research content and innovation are as follows:1.Based on the standard of R15 version protocols,this thesis discusses the 5G PDCCH link in theory and uses the RTL(Register Transfer Level)code to implement the link on FPGA(Field-Programmable Gate Array).Finally,the feasibility of the scheme is explained in terms of resource consumption and resolution rate of the entire link.2.This thesis analyzes the traditional blind detection algorithm and proposes a algorithm of SS-LBD(Low Blind Detection on Spectrum Sensing)and implements the algorithm on FPGA in the engineering part of the PDCCH link.When the SNR is 9d B,compared with the traditional algorithm of E-BD(Exhaustive Blind Detection),the proposed algorithm’s average number of blind detection is reduced by 59.7%.The proposed algorithm can effectively reduce the number of iterations and the analytic delay of PDCCH and can be used in actual projects.3.This thesis analyzes the traditional Polar(Polarization)code decoding algorithm and proposes a algorithm of LI-BPD(Low-Iteration BP Decoding).This algorithm reduces the number of iterations in the BP decoding process and can effectively reduce the delay of Polar decoding without deteriorating the frame error rate.When the SNR is3 d B,compared with the traditional BP decoding algorithm,the number of iterations of this algorithm is reduced by about 53%;The number of normalized average calculations of process elements is reduced by about 68%.