DPTX Verification Method Based On UVM

The increasing development of So C design at scale has made the efficient verification an important part of the whole process in chip design.UVM,the universal verification methodology,is a class library integrated on the basis of System Verilog.By using UVM to build a verification platform,the project’s development period can be compressed largely.Display Port(DP for short),a difference bus interface with high transfer rates,is a standardized video interface standard launched by the Video Electronics Standards Association(VESA for short),and it is divided into transmitter(DPTX for short)and receiver(DPRX for short).In this thesis,the functional verification of DPTX in the practical project has been made through the UVM verification methodology based on its advantages mentioned above.The whole process of verification is summarized as follows.First,by analyzing the Display Port protocol and its background,the author gets the hang of the way of data transmission in Display Port protocol,which makes it possible to carry out the follow up work in an orderly way.Then,the author analyzes the UVM verification methodology and summarizes its characteristics.After that,the author sets up the verification plan by understanding the RTL module devised by designers,summarizing the scenario covered and analyzing the requirements in the verification based on Display Port protocol.Given the complexity and long period of realizing the verification environment,the author uses Display Port VIP from Cadence for simplifying the development process to build the verification environment,which is essentially developed on the basis of UVM and System Verilog.And the author connects DPTX(to be verified in design)with DPRX(the VIP component)to realize a complete link transmission and therefore establishes the verification platform.And then,the correct data transmission of audio and video shall be completed through Display Port interface,which does not send these types of data itself.Therefore,it is necessary to create the temporary excitation mechanism of these data and connect it to the DPTX interface.And based on the DP VIP,complete various components of the UVM verification platform,and create instantiated classes.The sequence and conditions of each scene in the verification platform is managed through the lineal control of the virtual sequence.Before the start of data transmission in the verification environment,use link training to ensure that the transfer link can be established,and complete the initialization configuration of DPTX and DPRX.During data transmission,make sure the video and audio data input to the DPTX and that output from the DPRX are same.Finally,according to the function of verification,complete test cases and motivate the simulation to ensure that all simulation tests can pass,which gurantees a complete function verification.Make a cursive test to prevent bugs from escaping,track errors with waveform and log,analyze the quality of verification and summarize experience and limitations at last.The UVM-based DPTX verification platform designed and implemented in this thesis is qualified to complete the functional verification of DPTX.It has been applied to the successful tape-out of chips in practice,which demonstrates the practical value of the UVMbased DPTX verification platform.