Research On Testing Method Of Network Parameters Of Semiconductor Devices At A Wide Impedance Range

With the development of semiconductor materials and electronic information technology,semiconductor devices are also developing rapidly and have developed to the third generation since the middle of last century.The third-generation semiconductor devices,represented by Silicon Carbide(Si C)devices and Gallium Nitride(GaN)devices,have a series of excellent characteristics such as high breakdown electric field,high thermal conductivity,high electron density,high electron saturation drift velocity,and affordability for high power.Therefore,they have a wide range of applications and development prospects in important fields such as semiconductor lighting,communications,military defense,petroleum exploration,aerospace,and new energy.They have been widely regarded as one of the new driving forces for the development of today's electronics industry.However,GaN devices,with lower input and output port impedance,cannot match the impedance of the 50 ohm test system commonly used today.When using a vector network analyzer to measure its characteristic parameters,the measurement results will be greatly affected.Regarding the problem of measuring the characteristic parameters of high-power semiconductor devices,this thesis first studies transmission line theory,network parameter theory and impedance transformation and matching.Next,this thesis studies the structure and error model of the network analyzer test system,and proposes and compares the test system based on the impedance tuner and the test system based on the test fixture in the shape of impedance gradient line,and chooses the latter as the main implementation method of this thesis.It is called the testing method of wide impedance network parameters of semiconductor devices here.This method uses High Frequency Structure Simulator(HFSS)software to design test fixtures with impedance pre-matching function based on the impedance gradient line.The fixtures play two roles in the circuit.The first role is similar to the ordinary test fixtures,which is to fix the DUT;the second role is the key to this test,which is impedance conversion.The fixtures converts the 50 ohm port impedance of the test instrument to a small impedance value that is closer to the impedance of the input and output ports of the semiconductor device,which improves the measurement accuracy,reduces the error,and expands the impedance range of the test system.This article builds a corresponding test system,and uses Advanced Design System(ADS)software to verify the feasibility of the test method.In addition,this thesis studies the SOLT calibration method and the TRL calibration method.Based on the research of these two methods,a fixture de-embedding method is proposed,which is applicable to the test method of network parameters in a wide impedance range proposed in this thesis.In this de-embedding method,we use the test fixtures to fix two transmission lines with the same width and different lengths to form a calibration piece.This dual-segment transmission line-based fixture de-embedding method not only measures and solves the S parameters of the test fixture we designed,but also simplifies the cumbersome de-embedding process in traditional SOLT and TRL measurements.At the end,S parameters of a certain type of semiconductor device are extracted using the research results of this article,and the measurement results are compared and analyzed.Through the research,simulation and test of wide impedance network parameter test methods,this thesis improves the test impedance range and accuracy of third-generation semiconductor devices represented by gallium nitride power devices,and makes up for the problem caused by the mismatch between third-generation semiconductor devices with lower input and output impedance and the commonly used 50 ohm test system to a certain extent,which provides a new method for the network parameter test of high-power semiconductor devices.