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IC Design And Research Of SPI_IP Core Based On AMBA

Posted on:2022-11-10Degree:MasterType:Thesis
Country:ChinaCandidate:B X JiaFull Text:PDF
GTID:2518306761490434Subject:Computer Hardware Technology
Abstract/Summary:PDF Full Text Request
With the development of the integrated circuit industry,IC(Integrated Circuit)industry has attracted more and more attention by our country.In recent years,the state has made great efforts to develop technology in the field of IC in order not to be "stuck".Only by mastering the advanced technology of chips can we grasp the journey of development in the information age.To make more in-depth research on the field of integrated circuits,this thesis designs an IP core based on AMBA bus architecture and analyzes the IC of the IP core.Based on SOC(System On Chip)system on chip,the key technologies of SOC are studied,and the advantages and disadvantages of the on-chip bus are analyzed.An in-depth study of IP core reuse technology and IC design back-end technology,formulate the design idea of IP core.Using IC front-end programmable tools,the overall architecture of IP core is designed,and the internal modules of IP core are coded at the RTL level.The designed IP core supports fullduplex synchronous serial data transmission,scalable bit width,multiple transmission modes,and APB and SPI protocol standards at the same time.The interface module uses APB protocol to realize the communication between bus and CPU,which greatly improves the work efficiency;the baud rate module uses frequency division technology,which is suitable for most standard baud rates,which not only saves the hardware resource loss when configuring the clock but also facilitates the further configuration of users for the expansibility of IP core.When the data is sent and transmitted,the edge detection method is used to avoid the redundant state of the state machine,and the accuracy of data transmission is greatly improved.After completing the front-end design of the IP core,the process of transferring the RTL file to the back-end gate-level Netlist file is completed by using the DC(Design Compiler)synthesis tool,and the report generated by the DC comprehensive design process is analyzed and verified.Finally,Innovus automatic layout and routing tool is used to complete the layout and routing process of IP core.Finally,the results of routing are analyzed and the layout is physically verified.The analysis results of the final report show that the designed IP core can complete the process of translating RTL-level files into back-end netlist files.The final wiring summary report shows that the porous occupancy rate reaches 82.7%,which is relatively high compared to ordinary projects.After physical verification and formal verification,the function of the layout circuit diagram is consistent,and the expected design goal is achieved.
Keywords/Search Tags:IC(Integrated Circuit), IP Core, Advanced Microcontroller Bus Architecture, Design Compiler synthesize
PDF Full Text Request
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