| 5G communications use higher frequency bands and expand the frequency range to millimeter bands,bringing it faster speed,lower latency,and wider frequency bands.It will mainly be used in the millimeter wave radar module of the driverless vehicle technology to provide real-time road and vehicle information for the driverless system and improve the safety and reliability of driving.At present,mainstream automobile manufacturers have followed up research and development,and there are also some emerging chip design companies in China focusing on millimeter wave vehicle radar modules.However,the increased frequency also means higher requirements for communication quality:the phase noise of PLL system needs to be lower.For voltage controlled oscillator(VCO)module,its main contribution is phase noise outside the PLL bandwidth,so the design of millimeter band VCO with low phase noise is very important.Firstly,this thesis introduces the background and significance of MMW VCO,and the research direction and achievements at home and abroad in recent years.Secondly,the basic theory of VCO is introduced,including basic working principle,main circuit performance index and key passive device design.Finally focuses on the theory of the phase noise of VCO,the phase noise sources,two kinds of analysis model of phase noise mechanism including linear time invariant models,linear time-varying model has carried on the detailed analysis,and the innovative of linear time invariant model simulation of large signal to the correction formula,make it can not only intuitive description phase noise mechanism,at the same time,the phase noise can be calculated more accurately.The first design of this thesis is based on the phase-locked loop of atomic clock application of the 4.6ghz class-B VCO design,using TSMC 65nm CMOS process.In the actual test,the designed VCO power consumption is 4m W with a frequency coverage range of 4.32GHz-4.72GHz.When the VCO outputs 4.6GHz signal,the phase noise reaches-97dBc/Hz@100KHz,-119.5dBc/Hz@1MHz.The suppression of the second harmonic reaches 32dB.The area of the chip is 400um*450um.The second design of this thesis is based on 5G high frequency application background,working frequency of 25.8GHz low phase noise Class-F VCO,based on TSMC 65nm CMOS process.After testing,when VCO outputs 25.8GHz signal,its phase noise is-109.1dBc/Hz@1MHz with a frequency coverage range of 24GHz-28.5GHz,17.4%.Core power consumption is 11.47m W,FOM value is 186.7dB.The core chip area is 0.13mm~2. |