| With the rapid development of mobile communication technology,communication equipment is evolving towards the large bandwidth and high frequency millimetre wave band,and the complexity and transient characteristics of electronic signals are showing a sharp increase,which puts higher demands on the fields of wireless communication and electronic test instruments.In order to accelerate the commercialisation of millimetre wave communication technology,the development of relevant test instruments is on the agenda.Millimetre wave communication test instruments can produce errors such as phase noise and in-band flatness gain due to the non-ideal characteristics of the device,affecting the accuracy of the test results.To eliminate these errors,the test instrument needs to be compensated for phase noise and in-band flatness gain.In millimetre wave communication test instrument design,phase noise is generated because of the multiple multiplication technique used to provide millimetre wave fundamental oscillation to the millimetre wave base wave mixer,and the additional phase noise generated in this process can cause deterioration of the system demodulation index.Therefore,the phase noise of the instrument itself needs to be compensated for to eliminate its effect on the device under test.The traditional PTRS-based phase noise estimation and compensation algorithm is simple in structure but the frequency offset and sampling clock offset still need to be compensated by adding a lead signal.Therefore,a comprehensive estimation and compensation algorithm is needed.The particle filtering algorithm avoids the problem of low estimation accuracy due to excessive granularity using the PTRS algorithm,and the comprehensive estimation also improves the test compensation efficiency.The in-band flatness gain in millimetre wave communication test instrument design arises because the signal transmission gain fluctuates with frequency.For example,the RF amplifier,mixer and IF filter all affect the gain characteristics of the entire RF transmission network,causing in-band flatness gain variation and resulting in signal distortion.Although the introduction of matching circuits between the two amplifier stages can further reduce the deterioration in frequency response caused by inter-amplifier adaptation.However,the frequency response of the amplifier itself still exists and the ripple caused by the filter network cannot be resolved,and a digital filter is required to compensate for this in order to obtain high accuracy EVM test results.During the implementation of the compensator,the parallel filter multiplier of the conventional structure uses too much leading to excessive consumption of FPGA hardware resources.A new structure of filter is needed to further reduce the use of multipliers.In this paper,phase noise estimation and compensation,flatness compensation and their implementation techniques are investigated in the context of millimetre wave large bandwidth signals.The main work and innovations are as follows:(1)A comprehensive estimation algorithm for phase noise,frequency offset and sampling clock offset based on particle filtering is proposed.Using the good robustness and adaptability of the particle filtering algorithm,the phase noise,frequency offset and sampling clock offset are effectively estimated and compensated,and successfully applied to millimetre-wave communication test instruments.Experiments show that the algorithm achieves an EVM index of 2.21% for the millimetre wave communication tester at a carrier frequency of 28 GHz,a bandwidth of 400 MHz and a modulation method of 64 QAM.(2)An algorithm for in-band flatness compensation of large bandwidth signals based on frequency sampling method is proposed.The algorithm uses the wideband sparse signal to obtain the frequency response parameters and uses the coefficients to design the compensation filter.The amplitude compensation of the baseband signal is performed in the FPGA in the compensation mode,thus meeting the requirement of 1d B gain flatness of the millimeter wave RF transmission network,and the demodulation index of the receiver 400 MHZ QPSK signal reaches 1.404%.(3)A parallel fast FIR digital filter is designed,which can save the flatness compensator hardware implementation resources.Compared with the conventional parallel FIR filter,the 4-way fast FIR complex filter in the FPGA implementation reduces the DSP usage by 25% and LUT usage by 22.4%,while reducing the DSP power consumption by 24.1%. |