Design Of Control Circuit For Chip Scale Atomic Clock

The movement and change of all things in the world follows the pace of time.At present,the world’s most accurate tool for measuring time is the atomic clock.Traditional atomic clock is widely used in precision time synchronization,precision navigation and military and other fields because of its high precision and high stability.However,there is a lack of portability due to its high power consumption,high price and large size.The chip scale CPT(Coherent Population Trapping)atomic clock is dedicated to high precision,high stability,low power consumption and miniaturization.Three main parts are included in this system:physical package,peripheral control circuit module and RF module.This paper mainly studies the assembly and testing of temperature control servo loop,laser current control servo loop,photoelectrical detection circuit and physical package and chip scale atomic clock sample.The specific work and innovations are as follows:(1)To realize the temperature accuracy of the alkali metal zirne atomic steam bubble in the physical package of the chip-level atomic clock and VCSEL(Vertical cavity surface emitting laser)laser device is±0.05℃,the customized ITO heating film is used and a temperature control circuit that can meet the requirements is designed based on the incremental PID control algorithm and constant current source circuit,which can also meet the requirements of the low power consumption for the chip scale atomic clock.(2)In order to lock the VCSEL laser emission wavelength on the D1 spectral line of the alkali metal zirconium atom,the VCSEL laser device is fine-tuned by the internal DAC of the microcontroller MSP430F2618 and rough-tuned by external DAC LTC2600.Thus the first loop of the chip scale atomic clock is locked.(3)On the basis of completing the design and testing of key circuits,the physical package is assembled and constructed vertically,and then tested with the complete chip scale atomic clock sampler composed of RF frequency module and peripheral control servo loop.The phase noise,Allen variance,stability and power consumption of the chip-level atomic clock sampler were tested.The test result for the chip scale atomic clock sample designed in this project achieves its performance as below:its phase noise at 1Hz is-51.03dBc/Hz,the stability of 1 second can reach 1.5×10-10,The stability of 1 hour can be up to 1.0×10-11,power consumption is about 200m W,and the size of the chip scale atomic clock sample is 6×6cm2。...