Design Of Low Noise Crystal Oscillator And Phase-Locked Loop Circuit For Rubidium Atomic Clock

Rubidium atomic clocks(RAC)are widely used in satellite navigation system because of its small size,low power,simple structure and high stability.Frequency stability of RAC has a significant impact on the positioning accuracy of the navigation system.Reducing noise in circuit is important to improve the frequency stability of RAC.The work of this paper is centered on the frequency synthesis circuit scheme of RAC proposed by our laboratory,which has the advantages of low phase noise,controllable power,easy debugging and is suitable for high performance RAC.The focus of this work is the design and implementation of low noise crystal oscillators and phase-locked loop(PLL)circuit.The main work of this paper is as follows:The study began with the characteristics of the crystal oscillator,which provided theoretical guidance for the design of the crystal oscillator.And then,by using Colpitts circuit scheme with good frequency stability and choosing adapted elements,the design and implementation of miniaturized low noise 100 MHz and 10 MHz crystal oscillator were completed.The performances of both crystal oscillators were tested and evaluated.The test results show that the phase noise of 100MHz crystal oscillator was-108dBc/Hz@1Hz and-169dBc/Hz@10kHz,short-term frequency stability was 7.8×10-12/s;the phase noise of 10MHz crystal oscillator was-103dBc/Hz@1Hz and-164dBc/Hz@10kHz,short-term frequency stability was 1.7×10-12/s.The study of PLL is another part.The principle and characteristics of the phaselocked loop were analyzed,and the moudules and their functions of the PLL were introduced.The phase noise characteristics of the PLL were studied theoretically,which provides a theoretical basis for design of the PLL circuit.Firstly,the hardware design of the PLL circuit module(including discriminator,frequency divider and loop filter)were conducted.Secondly,the design,fabrication and debugging of the low noise 10 MHz crystal oscillator PLL circuit were completed.Finally,after the phase-locked function was implemented,PLL performance was tested.The test results show that the PLL circuit has good phase noise characteristics both in the near and far ends.Through analysis,calculation and evaluation,we come to the conclusion that the performance of the new frequency synthesizer scheme based on 100MHz crystal oscillator(as the local oscillator of RAC)and the 10MHz PLL circuit could be significantly improved,comparing with the traditional frequency synthesizer scheme of RAC.The effect of phase noise of the new frequency synthesizer scheme on the frequency stability of RAC was reduced by about 3.6 times,reaching 4.1×10-14/τ1/2 level,which lays the foundation for the future development of ultra-high performance RAC with frequency stability of ≤1×10-13/τ1/2.