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Research On High Efficiency Peak Current Mode Buck-boost Power Management Chip Design Technology

Posted on:2023-07-11Degree:MasterType:Thesis
Country:ChinaCandidate:X T CaoFull Text:PDF
GTID:2532307040994639Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
Screen display is a bridge for people to communicate with electronic products,among which AMOLED displays are widely used in the screen display of electronic products due to their advantages of fast response,self-illumination,high resolution and flexibility.AMOLED display needs two channels of positive power supply and one channel of negative power supply.BuckBoost converter can output negative voltage within a certain range due to its own special topology,which is often used as gate control of switching TFT in AMOLED basic pixels.The signal is used to control the gate and turn-off of the pixel.In order to ensure high-performance screen display requirements,it is of great significance to study Buck-Boost DC-DC converters with high reliability,high stability and high efficiency.Through the detailed analysis of the working principle and control method of the DC-DC converter,this paper has carried out the research on the key technology of the design of the highefficiency peak current mode Buck-Boost power management chip.Aiming at the research goals of high efficiency,high precision and high stability of DC-DC converters,this paper analyzes the system power loss,error sources and loop characteristics in detail;Aiming at the conduction loss of the power switches in the system,the basic structure of the Buck-Boost converter with all NMOS power transistors is proposed.Compared with PMOS with the same aspect ratio,NMOS power transistor greatly reduces the on-resistance of the device and improves the system conversion efficiency;In order to improve the output accuracy of the system,in view of the disadvantage of large error caused by the adjustment based on the resistance feedback coefficient in the traditional structure,The structure proposed in this paper adjusts the operating point of the traditional error amplifier,reduces the feedback voltage to the error amplifier during system mismatch,the simulation results show that the output voltage accuracy can reach 0.259%;Aiming at the problem that the sampling gain drift is unstable due to the infl uence of the PVT on the sampling resistor RDS in the traditional structure,a high-precision sampling circuit using the onresistance RDS of the power tube to sample the inductor current information is improved,Provides a reliable solution for high-efficiency and high-precision Buck-Boost DC-DC converters;In order to improve the life and reliability of the chip,the research and design and implementation of core protection circuits such as current limiting protection,soft start,and overcurrent protection have been completed to ensure that the system is shut down in time when the chip is in an abnormal working state to avoid damage or destruction to the chip.In this paper,the circuit and system design and layout design are completed based on the CSMC 0.18μm high-voltage BCD process.After comprehensive verification,when the input voltage is 2.9V to 4.5V,the switching frequency is 1.50MHz,the output voltage can realize programmable control from-5.4V to-1.4V,the load capacity is-910mA,the output voltage ripple is 7mV,the load regulation rate is 0.185%/A,and the linear regulation rate is 0.0049%/V.Efficiency remains above 80%from no-load to full-load,and reach up to 93%.
Keywords/Search Tags:Buck-Boost, High efficiency, NMOS power transistor, high precision, error amplifier
PDF Full Text Request
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