| The chip industry is the cornerstone of the entire information industry and it’s also the last barrier to national information security.In recent years,with the outbreak of emerging concepts such as AI and metaverse,requires chips with better performance,chip scale continues to increase.In order to ensure the correctness of chip functions,the proportion of verification in the entire chip design process is also gradually increasing.Improving verification efficiency has become crucial.Building a flexible,efficient,portable,and scalable verification platform quickly,can not only shorten the chip cycle,but also save manpower,which is the key to the success of the chip.Based on an audio SoC chip,this paper studies and analyzes the author ’s verification work in an IC design company.Firstly,extraction of function points according to design requirements,secondly building a UVM verification platform,manufacturing random and directional test cases,and finally completing the collection of coverage.The verification platform was built at the IP level,subsystem level and SoC level to verify the chip,which has been successfully taped out.Mainly done the following research and work:(1)There are many audio SoC modules,and building a verification platform for each module is a time-consuming and repetitive task.Based on the similarity of the verification platform structure,this paper proposes a way to generate the verification platform framework through scripts and templates.Filling the code in the generated components can quickly and efficiently build the verification platform,which greatly reduces the repetitive work in building the verification platform.The callback mechanism is introduced,and the operation of the verification component can be easily modified through the built-in functions,which improves the reusability of the verification platform.(2)AFLT(Audio Filter)is composed of many small modules.The traditional UVM verification platform needs to build a monitor and scoreboard for each small module to verify,the verification environment is redundant.This paper proposes a method based on file comparison,which prints the output of each level of small module and reference model to a file,and then compares the data in the two files through a script.It could improve verification efficiency by innovating the verification environment.(3)In the verification of subsystem level and SoC level,software and hardware cosimulation verification is adopted.Through software language to configure the chip,after the configuration is completed,it is synchronized to the verification platform,and the test sequence is started to stimulate the chip.It has been consistent with the actual use scene of the chip so it can guarantee that the audio SoC works properly.(4)The focus point of IP-level,subsystem-level,and SoC-level verification is analyzed,and the chip is verified at different levels according to the focus point,and the three-level verification platform is analyzed by taking some modules as an example.Write random test cases for the function points of the module and the system,and rand testing in verification stimulus,configuration and environment,covering all the scenarios as much as possible.Analyzing the waveform to ensure the completeness of verification.Using the coveragedriven verification method,regresses continuously.For some scenarios that cannot be covered,directional test case verification is used,and finally the code coverage rate is 96.32%and the functional coverage rate is 100%. |