Implementation Of BP Algorithm For High Resolution SAR Imaging Based On FPGA

Synthetic Aperture Radar(SAR)imaging technology is developed on the basis of traditional radar technology.It has the characteristics of all-weather and all-weather,and the obtained imaging images have high resolution.It has been widely used in military applications.,civil and aerospace and other fields.In order to meet the actual needs,the SAR imaging system has higher and higher requirements for real-time performance and resolution.The traditional method of using a digital signal processor(Digital Signal Processor,DSP)to realize radar imaging can no longer meet the needs,and the digital integrated circuit is effective.The most representative one is the Field Programmable Gate Array(FPGA)chip.In this paper,the realization of Back Projection(BP)algorithm for high-resolution SAR imaging based on FPGA is the main research content.Combined with the performance advantages of FPGA chips,the BP imaging algorithm is implemented using a single FPGA chip.The Fast Back Projection(FBP)imaging algorithm completes the function simulation,board testing and result analysis of the algorithm to meet the requirements of miniaturization and high resolution.The main contents of this paper are as follows:Firstly,the space model of spotlight SAR is established in this paper.Based on this model,the realization principle of BP imaging algorithm and FBP imaging algorithm is described in detail in the form of formula derivation,and the operation process and calculation amount of the two are analyzed.In order to verify the correctness of the imaging algorithm,the simulated echoes are imaged in Matlab.The imaging results show that the BP and FBP imaging algorithms have better imaging results,and the FBP algorithm has the advantage of less computation than the BP algorithm.According to the design requirements of the algorithm,the overall scheme of the hardware circuit of the BP algorithm verification board is determined,and the component selection,the circuit schematic design of each module,the hardware PCB design,and the data transmission test and power supply of the verification board are completed in turn according to the overall scheme.The test provides the hardware environment for the realization of the algorithm.Secondly,according to the imaging process of the BP imaging algorithm,the FPGA implementation of the BP imaging algorithm is divided into functional modules such as range-directed pulse compression,interpolation,phase compensation and data accumulation.Use Vivado development tools to design,write Verilog code and simulate functions in turn,and compare the simulation results of FPGA with Matlab and analyze errors.In order to reduce the amount of calculation,the full aperture is divided into subapertures,and the azimuth upsampling function module is added to realize the coherent superposition of sub-aperture data.On the basis of the BP imaging algorithm,an FPGAbased FBP imaging algorithm is implemented.Finally,a hardware test environment is built,and the designed algorithm is verified on the board through Matlab,Vivado development tools and the host computer,and the timing,resource occupancy and imaging results of the verification board are analyzed.The experimental results show that the BP and FBP imaging algorithms designed in this paper using a single-chip FPGA have good imaging results and meet the expected requirements in all aspects.