Research On Image Stitching Technology And Its FPGA Implementation

This thesis conducts research on image registration algorithms and their implementation on a Field Programmable Gate Array(FPGA)for real-time large fieldof-view,high-resolution image stitching systems,which are in demand for military reconnaissance and panoramic surveillance.The thesis optimizes the Scale-Invariant Feature Transform(SIFT)algorithm and implements an FPGA-based image stitching system,overcoming the contradiction between large field-of-view and high resolution,as well as the poor real-time performance and low portability of traditional image stitching systems.Based on the application requirements of large field-of-view,high resolution,and adaptability,the thesis designs the overall architecture of the image stitching system and builds it on an FPGA with Xilinx’s XC7A100TFGG484-2I as the main control chip.A stereo adapter board is designed for image acquisition,and DDR3 and high-definition multimedia interfaces are selected for image storage and output display.Timing simulation is conducted on the above modules to ensure the correctness of the timing logic.The thesis conducts in-depth research on the key algorithms in image stitching,performs performance simulations on three image registration algorithms,and optimizes and improves SIFT,which has strong robustness against translation,rotation,and illumination changes.Suitable image coordinate transformation and stitching processing algorithms are also selected to improve the stitching effect.Based on the algorithm flow,the thesis implements the establishment of the scale space,keypoint detection,generation of feature descriptors,and keypoint matching on the FPGA.The FPGA process of establishing the scale space and generating feature descriptors is optimized.The speed of establishing the scale space is improved by using a separate Gaussian filtering template and a block parallel approach.In feature descriptor generation,the rectangular area of the gradient distribution histogram is converted into a concentric circle area to avoid interference from neighboring pixels.The design idea of using eight concentric circles reduces the dimensionality of the descriptor from 128 to 64,reducing the occupation of FPGA hardware resources.Tests show that the image stitching system designed in this thesis has good performance for translation,brightness,rotation,and viewing angle changes.The FPGA resources occupied by the entire system include 28,892 LUTs,30,777 FFs,60 36 Kb BRAMs,and 64 DSPs.Objective evaluation of the stitching results is conducted based on three indicators: Root Mean Squared Error(RMSE),Structural Similarity(SSIM),and running time.The results show that the designed scheme in this thesis achieves a frame rate of 36 fps for stitching two 640x480 images,and the improved SIFT algorithm improves RMSE by 15% and SSIM by 10% compared to the original algorithm,meeting the expected design and having good application value.