| The verification of chip is the key link in the chip front-end development process,and it is also the most demanding and time-consuming link in the whole process.In the process of chip verification,how to improve the accuracy and efficiency is an urgent problem in the industry.The birth of verification methodology can effectively solve this problem,among which Universal Verification Methodology is the most popular verification method at present,and its p owerful function library and various mechanisms can greatly improve the efficiency and accuracy of verification.In this thesis,UVM is used to verify the global routing function of the switch chip developed based on the Peripheral Component Interconnect E xpress.The specific work includes:Firstly,according to the requirement specification of the chip,the feature list is put forward,and the overall architecture of the chip is worked out.Realize the function of the global routing module in the key switch chip architecture,and use this module to complete the virtual switch mode configuration of the switch chip.The global routing module reads the pin information of the chip,allocates the upstream port and the downstream port of the switch chip,est ablishes the global routing table and designates the management port,and finally divides 1-6 virtual switches.Secondly,use UVM to build a complete system-level verification platform.According to the number of hosts connected to the chip,a reference mo del is assigned to the hosts to simulate the function of the design under test.According to the number of chip enabled ports,the scoreboard for comparing data is allocated to verify the correctness of the global routing function of the chip.Analyze the code of key components in the platform and make a complete system verification scheme.Finally,the test function points are decomposed,test cases are written,simulation and waveform analysis are carried out.Randomize the chip mode and port enable number to verify the correctness of the routing function of the switching chip in different scenarios.Collect the code and function coverage,and the final collection results show that the code coverage rate exceeds 90%,indicating that the design code usage rate reaches 90%;The function coverage rate reaches 100%,which means that the verification function points are 100% covered.The verification platform designed in this thesis can adapt to all kinds of PCIe devices,and has the characteristics of high reus ability and portability.It can be reused with minor modifications in subsequent related projects.At the same time,the test cases used for verification adopt normalized parameters,which can automatically determine the operation mode of the design to be tested,generate the random excitation required by the current mode,and realize that one test case covers multiple function points. |