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Design And Implementation Of SAS Expander Firmware

Posted on:2024-01-01Degree:MasterType:Thesis
Country:ChinaCandidate:Y X LiuFull Text:PDF
GTID:2558307103472934Subject:Electronic information
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The increasing amount of data has put forward higher and higher requirements for storage technology and storage equipment,due to the current integrated circuit manufacturing technology and disk specifications,a single hard disk can only provide a relatively limited storage capacity.Therefore,in enterprise-level storage scenarios,the capacity of multiple disks must be consolidated in order to break the storage capacity limitation.Software algorithms and related hardware are used to make the disks become a logical whole.Therefore,SAS Expander is a necessary hardware device to build a larger storage array or storage system.SAS Expander is equivalent to the Ethernet router.In the SAS domain,SAS Expander connects to the host and end devices for data exchange and port expansion.This thesis first analyzes the development background and the current research status of Expanders both domestically and internationally.Then,it introduces various Expander-related technologies,including the SAS protocol,embedded real-time operating system technology,and Expander routing technology.In terms of hardware,it elaborates on the overall architecture of the chip and on-chip resources,providing support for subsequent firmware design.The key research content of this subject is to develop a set of SAS Expander firmware with complete functions and efficient operation based on HL7721 which independently designed and developed by H Company.The specific content mainly includes the development of bootloader program in ROM,the development of RAM code decryption and loading process,the support of SSP command and SMP command.Other firmware related functions include user interaction,firmware online upgrade,etc.The firmware uses Threadx embedded real-time operating system.Because the current Treadx official source code only supports 32-bit processors of RISC-V architecture,and the Expander chip used in this project is a chip of RISC-V64 architecture,the code related to processor architecture at the bottom of Threadx needs to be modified.In addition,it is necessary to divide the code into thread-level granularity according to the firmware function and embedded real time operating system characteristics,and run the firmware function in the form of thread scheduling.
Keywords/Search Tags:SAS Expander, large-scale storage, embedded real-time operating system, RISC-V
PDF Full Text Request
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