Research On Intelligent Code Completion Technique Of Hardware Description Languages

Software automation techniques can effectively mitigate the workload of software developers and improve the effectiveness of software development.As one of the most commonly used software automation techniques,code completion technique has been widely deployed in almost all integrated development environments.The application of many intelligent code completion techniques has improved the quality and efficiency of software development with the wide application of deep learning methods in recent years.However,most of the existing research on intelligent code complementation techniques focues on high-level programming languages,and there are few intelligent code complementation studies and techniques for hardware description languages.To improve the coding efficiency of digital IC design developers and reduce the redundant work,this paper proposes an intelligent code completion technique based on a generative pre-trained language model,and develops a plug-in for VS Code code editor platform based on this technique.First,in order to better accomplish the task of code completion in the hardware description language,this paper analyzes the characteristics of VerilogHDL code under different description methods and concludes that Verilog HDL code is different from high-level programming languages in terms of important features,namely parallelism.Then,a new intelligent code completion method is designed to take full advantage of the Verilog HDL code features and the powerful sequence text generation capability of the pre-trained language model GPT-2.Comparative experiments are set up in this paper to evaluate the code completion effect of this technique,and the results show that the actual performance of the method is greatly improved compared to the existing baseline.Finally,a plug-in based on the method is implemented for VS Code editor,aiming to improve the development efficiency of coders.