Research And Implementation Of Key Technologies Of AI Chip Packaging Based On SiP Technology

With the rapid development of 5G(5th Generation Mobile Communication Technology)communications and integrated circuits,the artificial intelligence industry has exploded,and AI(Artificial Intelligence)chips are the physical basis for the interconnection of all things and the landing of various intelligent applications in the future.The most important thing about AI chips is computing power and power consumption,in the case of Moore’s Law almost to the physical limit,AI chips’ computing power improvement and power consumption reduction are increasingly dependent on advanced packaging technology represented by SiP(System in Package)technology with the characteristics of 3D(Three-dimensional)integration,precision interconnection,heterogeneous integration,etc.At the same time,AI chip high bandwidth,low latency,low power consumption and other requirements for the package design also put forward higher requirements,of which the substrate is the carrier and essential of the package design,the substrate is the carrier of the chip device and the packaging process flow,but also to achieve the chip-to-chip and chip-to-PCB(Printed Circuit Board)interconnect communication bridge,the quality of the substrate design has a crucial impact on system performance,is the key to chip packaging.Substrate in package design is a relatively comprehensive problem involving multi-faceted technology,including substrate process technology,package interconnect technology,substrate interconnect technology and signal integrity,and packaging process technology.The thesis studies the key technologies of AI chip packaging based on SiP technology,namely the design problem of the substrate,the main contents include: first understand the structure of the SiP packaging substrate and WB(Wire Bonding),FC(Flip Chip)interconnect technology,introduce the signal integrity problems related to the substrate interconnection,including transmission line theory,signal integrity theoretical basis,and network scattering parameters,providing a theoretical basis for the design of high-density SiP packaging substrates;Then,based on full-wave electromagnetic field simulation software ANSYS HFSS 3D for arbitrary structures,the common interconnection structures of the substrate,including microstrip lines,coplanar waveguides,differential lines,and differential via structures,were modeled and simulated,and the effects of different interconnect structure parameters and material properties on interconnect characteristic impedance,S11 and S21 transmission characteristics,and microstrip line crosstalk characteristics were studied.In turn,it provides a signal integrity-based basis and guidance for subsequent substrate designs;Finally,based on the above research,for an AI chip and a DDR3 memory chip,using SiP system-in-package technology,Cadence APD is used to complete the design of the package substrate.Based on the above research and design,the final design of this paper realizes a SiP(system-inpackage)with AI chip and DDR3(Double Data Rate 3)memory chip vertically stacked.The AI chip mainly includes DDR3,MIPI(Mobile Industry Processor Interface),USB2.0(Universal Serial Bus2.0)three high-speed interfaces and a variety of power supplies,the nμmber of chip pins totaled 880,SiP package substrate is a 4-layer substrate,the package form is BGA(Ball Grid Array),The interconnect forms are WB and FC,the design has been simulated and tested,and the system has stable performance.The design has been simulated to meet the performance requirements of the system.