Research And Integrated Circuit Design Of RSA Encryption Algorithm Based On ARM Architecture

With the rise of new technologies such as big data,cloud computing and artificial intelligence,the problem of information security is becoming increasingly prominent.As a means to solve the problem of information security,cipher system is playing an increasingly important role in the field of security.RSA encryption algorithm is the most widely used public key cryptography algorithm.The principle of the algorithm depends on the difficulty of factorization of large integers in number theory,and it has very high security in theory.The core of RSA encryption algorithm is the modular power operation of large integers,and the decomposition of modular power operation is modular multiplication operation.When the data involved in the operation is large,the modular multiplication operation is very time-consuming,which greatly reduces the efficiency of RSA algorithm.In view of this problem,this paper mainly carries on the in-depth research and analysis to the hardware implementation of RSA algorithm,the main work is as follows:(1)Theoretically analyze the principle of RSA algorithm and its implementation process,compare and study different algorithms to achieve modular power operation and modular multiplication operation,comprehensive performance and hardware implementation requirements,select R-L fast modular power algorithm to achieve modular power operation,improve and adjust the traditional modular multiplication algorithm implementation.(2)The improved Montgomery modular multiplication algorithm is adopted to design a parallel structure of the double multiplier.By introducing additional parameters,the regular operation of the double multiplier and the adder is effectively controlled and the modular multiplication operation is efficiently completed.In addition,the improved Booth decoding 64-bit multiplier and 128-bit hybrid adder are optimized to further improve the efficiency of modular multiplication and modular power operation.(3)Design the overall framework of RSA encryption algorithm,and divide the modular power module with Montgomery modular multiplication operation and basic operation unit.This paper describes the circuit design and implementation process of RSA encryption algorithm.On the basis of the overall module division of the system,through the analysis of algorithm flow,the logic control of modular power and modular multiplication module is realized respectively.For the division of time sequence in the design,the 14-level logic gate is a clock cycle.On this basis,it takes three cycles for a 64-bit multiplier,one cycle for a 128-bit hybrid adder,and 915 cycles for a 1024-bit modular multiplier.(4)Finally,Verilog language was used for code implementation,and simulation verification was carried out in Quartus and Modelsim environment.At 300MHz clock frequency,when the public key is 65537,the RSA encryption rate can theoretically reach 17,256 times/s(16.85MB/s)and decryption rate 320 times/s(0.31MB/s).And with the continuous development of technology,the speed of the basic operation unit will increase,and the overall circuit performance will be further improved.