Design And Implementation Of The Transmitter Side Of The High-Speed Transmission Link Of Satellite-To-Ground Fusion On FPGA

With the rapid development of mobile communication technology,the terrestrial 5G mobile communication system has entered the commercial stage,and the coverage in large-scale IoT and other scenarios has raised higher requirements,while the biggest advantage of satellite communication is the wide coverage,which can well make up for the shortage of terrestrial communication system,and the integration of satellite communication system and terrestrial 5G mobile communication system is the future development direction of mobile communication.To realize the high-speed transmission link of satellite-to-ground fusion,high-capacity data transmission and data processing are required,and the use of FPGA for link data processing can effectively improve the system performance.In this thesis,we propose an FPGA-based design for the transmitter architecture of high-speed transmission link of satellite-to-ground fusion,focusing on the data processing process in the transmission link,and combining it with DSP to perform relevant tests and functional verification in the hardware platform.Firstly,according to the requirements of the hardware platform in the high-speed transmission link of satellite-to-ground fusion,the functional analysis of FPGA and DSP-related chips is performed,and the hardware architecture platform combining FPGA and DSP is designed.Then,the data processing process in the transmission link is analyzed and the scheme is designed,and for the different characteristics of the transmission link in different frequency bands,the modular design is carried out for Ka-band and L-band respectively,and each module is introduced in detail to design the FPGA module that meets the functional requirements of the transmission link.Secondly,through the understanding of the overall architecture design of the transmission link,the FPGA implementation process of the link is completed by using Verilog HDL hardware programming language,and the entire project is synthesized,implemented,and layout wired under the Vivado platform simulation to verify the correctness,and the bitstream file is generated and loaded into the FPGA chip,and under the control of DSP,the RF board transmits out the data.Finally,the receiver receives the transmitted data,data processing is performed on it,and comparison is made with the transmitter side to verify the correctness of the transmitter architecture design of the highspeed transmission link of satellite-to-ground fusion.