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Design And Hardware Implementation Of Digital Signature System Based On SM9 Algorith

Posted on:2024-02-29Degree:MasterType:Thesis
Country:ChinaCandidate:S JingFull Text:PDF
GTID:2568306917975739Subject:Electronics and Communications Engineering
Abstract/Summary:PDF Full Text Request
With the rise of the Internet age,security issues in the process of information transmission had become more and more prominent.Therefore,cryptography had become an important technology to ensure national information security.The identification cryptographic algorithm avoided the complicated certificate exchange process and key management problems in the PKI system.The SM9 algorithm was an identification encryption algorithm independently developed by my country.It was usually implemented by software,but its operation speed was relatively slow,which would seriously affect the system efficiency.Therefore,it was of great significance to use hardware to realize the acceleration of SM9 digital signature system.Among them,the most time-consuming were the bilinear pairing and point product algorithms.In order to improve the performance of the system,this paper took measures to optimize the underlying algorithm and designed the hardware architecture.In terms of algorithm optimization,for the point multiplication algorithm: this paper designed a modular multiplication algorithm that supported four-stage pipelines,which greatly improved the operation speed,and used multiplexed registers to design parallel point addition/multiplication steps.For the bilinear pairing algorithm,this paper optimized the domain expansion formula by adding repeated items to reduce the calculation amount of the domain expansion;using the mapping relationship between the elliptic curve and the twisted line,the Frobenius automorphism only needed to calculate the fixed two-dimensional The parameter could be multiplied by the corresponding coefficient;by decomposing the polynomial,the calculation amount of the final modular exponentiation was reduced,thereby improving the algorithm efficiency.In terms of hardware design,this paper designed the corresponding hardware structure according to the optimized algorithm,and used Verilog language to write the code.In order to improve the data transmission speed,this paper encapsulated the digital signature and signature verification module as the IP core of the AXI high-speed interface.Finally,the system was tested on the ZYNQ7000 development board of Xilinx Company,and its correctness was verified.At a clock frequency of 200 MHZ,it took2.21 ms for a signature and 4.11 ms for a signature verification.
Keywords/Search Tags:SM9 algorithm, Digital signature algorithm, Bilinear pairing, Point multiplication algorithm, FPGA
PDF Full Text Request
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