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Research And Application Of CPU Parallelization Based On FPGA

Posted on:2024-05-19Degree:MasterType:Thesis
Country:ChinaCandidate:P C LiuFull Text:PDF
GTID:2568306944969929Subject:Computer technology
Abstract/Summary:PDF Full Text Request
FPGA is a field programmable logic gate array,which can be used as a carrier to realize the technical indicators and specific functions of the electronic system through EDA technology.It has the parallel characteristics of the circuit itself,which is suitable for realizing the parallel system that can carry out a large number of fast operations.Due to its infinite programming characteristics,FPGA has high flexibility.Through the special design of the system can greatly reduce the consumption of hardware resources.In this thesis,based on the idea of CPU parallelization,the parallelization of the arithmetic device,designed a parallel storage device,the core of which is a large number of independent computing units composed of storage array,for different problems,the function of each unit can be expanded,so on the basis of a strong computing ability also has a high flexibility.Based on the parallel CPU model,the parallel processing system is further designed and implemented in this thesis.Based on the GTM parallel computing model,the corresponding algorithm is proposed to solve the 9-variable set coverage problem and the 10-variable maximum clique problem.Compared with the traditional serial algorithm,the solution efficiency is high.Aiming at the function optimization problem,this thesis proposes a parallel algorithm to solve the optimal value quickly,and carries on the simulation implementation.It is a benign exploration to use this parallel processing system to obtain the optimal solution.The main work of this thesis is as follows:1.Based on the idea of CPU parallelization,a parallel processing system is designed and implemented by VerilogHDL language,including memory,controller,parallel storage device,input and output device,etc.2.Based on GTM model,a parallel algorithm is proposed for set covering problem and maximum clique problem.3.The parallel processing system is used to solve the 9-variable set coverage problem example and the 10-variable maximum clique problem example,which is successfully simulated by the software.On the basis of this,the FPGA development board is used to carry out the implementation,and the results are output on the LCD screen in an appropriate way.4.The parallel processing system is used to solve the 10-variable maximum clique problem example,complete the software simulation and FPGA board implementation,and output the results on the LCD screen.5.Aiming at the mathematical optimization problem,a parallel algorithm is proposed to obtain the maximum value quickly,and the parallel processing system is used for simulation implementation.
Keywords/Search Tags:FPGA, GTM research model, Parallel processing system, Maximum clique problem, Set covering problem
PDF Full Text Request
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