Design And FPGA Implementation Of A Multiphase Cascaded Low-Complexity Predistortion Method For Hundred Meg Broadband Amplifier

As an indispensable part of wireless communication system,Power Amplifier(PA)with high efficiency and linearity directly affects the performance of the communication system.In order to ensure high efficiency and achieve high linearity of PA,linearization technology is usually used.Digital Predistortion(DPD)has become the mainstream linearization technology due to its convenient application,good linearization effect and moderate resource consumption.With the increase of communication signal bandwidth,the PA will exhibit more complex nonlinear characteristics and memory effects,and the complexity of DPD will also increase.In order to solve the problems of high complexity of DPD and high consumption of hardware resources in wideband communication systems,a multiphase cascade predistortion method based on the integration of short memory generalized polynomial and linear time-invariant systems is proposed in this paper.The basis function is selected and iterated by grouping,the optimal grouping under different memory delays is taken from the observation matrix by using correlation,and then the optimal set of column vector is taken from the support set by using regularization.It achieves high precision of nonlinear distortion compensation without increasing the complexity of hardware implementation of predistortion.In this paper,the proposed DPD method is designed and implemented in Pico7z035 microcellular base station.The experimental results show that the proposed method can achieve high precision and low complexity nonlinear compensation of PA.