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Design Of Logic Operation Circuit Based On RRAM Memory Computing Integration

Posted on:2023-08-16Degree:MasterType:Thesis
Country:ChinaCandidate:H Y XuFull Text:PDF
GTID:2568307043487004Subject:Integrated circuit engineering
Abstract/Summary:
With the rapid development of artificial intelligence,image recognition and other emerging fields and the universal application of intelligent electronic devices,the huge amount of data that electronic devices need to process has brought greater challenges to the traditional von Neumann computing structure.Due to the separation of memory unit and processor unit,the traditional von Neumann circuit structure leads to the problem of "memory wall" and "power wall" when the circuit accesses the calculation data many times in the process of data processing.In order to solve this problem,"memory computing" came into being.The parallel multi line processing of data is realized in the memory,so as to improve the processing speed of data and reduce the power consumption caused by operation.Resistive random access memory(RRAM)provides more possibilities for in memory computing architecture because of its nonvolatile data storage and the "sandwich" structure of the device-the resistive material is wrapped by the upper and lower electrodes.Based on the above background,this paper proposes a 4T3R-RRAM memory cell.The main work is as follows: firstly,this paper completes the simulation verification of the whole process of data writing,operation and output for the four input data(00,01,10 and 11)of 4t3 rrram storage structure.The resistance of the memory is different from that of the electrochemical preparation formula.Secondly,when the resistance of the memory is too high or low,it is also a random variable resistance value,which is not consistent with the actual process,It will cause resistance state crossing and make the output result of logic operation wrong.Therefore,this structure verifies the margin between high and low resistance of AND and OR logic operation through simulation,and determines that this structure can avoid the logic operation error caused by resistance state crossing.Third,the core idea of this structure is to complete the data operation by controlling the turn-off of the transistor through the pull-down resistor.This paper analyzes the influence of the pull-down capability of the pull-down resistor on the resistive memory by simulating and testing the resistance state change of the data storage unit under different pull-down resistors,and determines the minimum resistance requirement of the pull-down resistor.Fourth,by comparing the logical operation steps of various RRAM in memory computing unit structures,it can be seen that this structure can require fewer operation steps in XOR operation.Fifthly,on the premise of ensuring the correct logic function,simulate and analyze the power consumption of the unit structure under different process pins and different temperatures,find out the influencing factors of power consumption,and put forward the design idea of reducing power consumption.Finally,the logic operation of this structure is simulated 1000 times by Monte Carlo,the operation success rate is analyzed,and the influencing factors affecting the success rate of each logic operation are analyzed.
Keywords/Search Tags:Computing in memory, Resistive variable memory, Boolean logic operation, Resistive state crossover
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