Key Circuit Design Of High-Speed And High-Reliability STT-MRAM

With the continuous reduction of the feature size of integrated circuits,traditional memories such as static random access memory,dynamic random access memory and flash memory gradually enter the performance bottleneck.Among the new types of memory,spin-transfer torque magnetic random access memory(STT-MRAM)is considered to be one of the most likely storage technologies to replace traditional memory due to its simple structure,fast response speed,high erasing and writing times,and intrinsic hardness to radiation effects.However,due to the temperature dependence of the Magnetic Tunnel Junction(MTJ),MRAM circuits have reliability problems such as low-temperature write difficulties and high-temperature read errors in a wide temperature environment(-40℃～125℃).Based on the 40 nm process node,this paper uses high-reliability 2T-2M memory cells to build a memory array.Taking the storage capacity of 1Mb,the read and write cycle of 30 ns,and the operating temperature range of-40℃～125℃ as the overall circuit design goals,the research work on the key circuits of STT-MRAM is carried out.On the premise of ensuring the high read and write speed of the circuit,with high reliability as the focus,combined with the temperature dependence and electrical characteristics of MTJ,the reliability of the key circuits of STT-MRAM is reinforced.Firstly,according to the device characteristics that the critical inversion voltage of MTJ is negatively correlated with temperature,an LDO circuit is designed to generate a stable write voltage,and the generated negative temperature coefficient write voltage is consistent with the temperature coefficient of the critical inversion voltage,so as to improve the low temperature write success rate and the high temperature magnetic tunnel junction durability.Secondly,the design of the most critical circuit on the read path,the sense amplifier,is optimized.Based on the traditional sense amplifier PCSA,a pre-amplification-latch sense amplifier with higher sensitivity is designed.The simulation results show that in the temperature range from-40℃ to 125℃,the linear regulation rate of write voltage generated by the designed LDO is less than2.94%,the load regulation rate is less than 0.43%,the maximum overshoot is 77.9m V,and the maximum undershoot is 99.7 m V.The temperature curve of the write voltage is in line with the temperature characteristics of the critical inversion voltage of the MTJ,and a design margin of 150 m V is reserved to ensure the inversion of the MTJ.The designed pre-amplification-latch sense amplifier can achieve no error in the results of 10,000 Monte Carlo simulations under the condition that the Tunneling Magneto-Resistance of the MTJ is only 30% in the full temperature range,which meets the design specification requirements.