Research On Acquisition And Tracking Technology Of BeiDou-3 Receiver

As a new signal broadcast by Beidou-3,compared with traditional navigation signals,B1 C signals have improved code tracking accuracy and anti-multipath performance by increasing bandwidth and code length,and have higher requirements for digital baseband signal processing.Acquisition and tracking are key technologies for B1 C signal reception,and their processing methods will directly affect the performance of the receiver terminal.For this reason,this paper researches and designs the fast acquisition algorithm and tracking loop of Beidou B1 C signal.This paper is based on the simulation and comparison of three basic acquisition algorithms,this paper aims at the problems of increasing the bandwidth of the Beidou B1 C signal,increasing the length of the ranging code,increasing the amount of data,increasing the complexity of the calculation,and slowing down the processing speed of the signal.A fast acquisition algorithm based on Beidou B1 C signal is proposed,which is improved by using average sampling,DIF-FFT based on pipeline structure and cascaded FFT algorithm with cross-term compensation.The Monte Carlo method in Matlab is used to experimentally prove that the acquisition speed is significantly improved after the improvement.When the false alarm probability is,the detection probability of medium-intensity signals is greater than 0.99.FPGA verification results show that the method saves 7% of DSP and 36% of Block RAMs design resources.The tracking loop consists of a carrier tracking loop and a code tracking loop.The carrier tracking loop is designed using a combination of a frequency locked loop and a phase locked loop,and analyzes and selects the appropriate identification algorithm,filter order and loop parameters according to the application background.For the code tracking loop,the discriminant principle of the loop is analyzed and the code phase discriminator is selected.For the proportional relationship between the carrier and the Doppler frequency shift of the pseudo code,the structure of the carrier tracking loop assisting the code tracking loop is used to improve the code tracking accuracy.Matlab simulation shows that the phase detector of the tracking loop has a stable output error of about 9° at about 400 ms,and the code phase error is less than 0.12 chips.This topic uses the self-developed Beidou satellite navigation receiver verification system as the verification platform.Based on the verification platform,the FPGA design and verification of the fast acquisition algorithm and the tracking loop are carried out,and the design is divided into modules under the Vivado development environment,and the key module design and function verification results are given.Finally,the overall board-level test is carried out,and the verification results are analyzed and verified with the help of an online logic analyzer,which proves the feasibility and correctness of the design.