Design And Implementation Of Artificial Intelligence Verification System Based On FPGA

As the manufacturing process of integrated circuits improves,the degree of chip integration is becoming higher.The implementing neural network algorithms based on hardware circuits has become a development trend.The development of chips has made artificial intelligence technology widely used in intelligent manufacturing,automation,and face recognition.As a chip for IC verification and artificial intelligence,FPGA has flexible construction and powerful data processing capabilities,making it suitable as a carrier for algorithm verification systems.This thesis implements an artificial intelligence verification system based on FPGA,which is used for digital calibration verification of ADC chips.The system completes verification tasks such as data acquisition,algorithm calibration,and data feedback.The work of thesis is as follows:Hardware circuit design of the verification system.The circuit is divided into four functional modules: algorithm processing,transmission interface,data storage,and power management.The algorithm module uses Virtex-7 FPGA as the core and is responsible for the processing of ADC digital signals.The FMC connector is designed as the transmission channel of ADC digital signals.Parameters,instructions and other data are transmitted through USB2.0 and Ethernet.FLASH and DDR3 are used as data storage modules.The power module is composed of multiple power chips to provide power requirements for FPGA and various chip device modules.Based on the hardware circuit,the FPGA software part design is completed.The calibration system is divided into clock,input,output,algorithm and other functional modules.The algorithm module is based on an artificial neural network to achieve the verification function of ADC artificial intelligence digital calibration.Software module design of the verification system.Based on the characteristics of algorithm input data loops and pipeline design thinking,the neural network calculation process is divided into multi-level modules,and each module is further subdivided into multiple basic functional units,establishing the entire transmission link of the verification system.Processing data simultaneously within a clock cycle completes the calculation of multiple sets of data.After the functional modules of the verification system are simulated,the verification system board is debugged with the ADC data acquisition board to complete the real-time digital output data calibration of the ADC chip.The process is as follows:configuring ADC register,and the digital signal and accompanying clock of the ADC sampling board are transmitted to the verification system board through the FMC interface.The digital calibration of the data is implemented inside the FPGA chip.The calibrated data is first stored in the FIFO and then uploaded to the PC through Ethernet.The ENOB parameter error between the calibrated actual measurement result and the simulation result is within 0.1,and the SFDR parameter error is within 3d B.The FPGA artificial intelligence verification system designed in this thesis meets the design requirements,completes the data calibration verification of the ADC chip back-end.It has reference value for the future integration of AI calibration algorithms for ADC chips.