A Research On Configuration Bitstream Analysis Technology For FPGA Security

Field Programmable Gate Array(FPGA)is an indispensable core device in many important fields and key infrastructures,and its security is a hot topic for academic and industrial.In order to prevent hardware hacking attacks,many institutions at home and abroad have carried out research on FPGA security detection technology.Since the FPGA configuration bitstream is a function file that must be loaded when the chip starts,and it contains all the design information of the chip,the analysis of the configuration bitstream becomes the last line of defense to ensure FPGA security.However,there are multiple protection measures for the FPGA configuration bitstream,including encryption,compression and implicit mapping.The existing technologies can only complete the bitstream decryption and bitstream reverse of some SRAM architecture FPGA chips,but there is still no effective measures for configuring bitstream decompression technology and Flash architecture FPGA configuration bitstream reverse technology.To this end,a FPGA configuration bitstream decompression technology and a FPGA configuration bitstream reverse technology are proposed in this thesis.The specific content is as follows:(1)A FPGA configuration bitstream decompression technology is researchedFirst of all,by analyzing the characteristics of compressed bitstream,the undisclosed bitstream compression algorithm rules of commercial FPGA is clarified.On this basis,a FPGA configuration bitstream decompression framework is designed,which can restore the compressed bitstream losslessly.The experimental results show that this method is effective for Xilinx FPGA compressed bitstream,and the accuracy rate of decompressing compressed bitstream for 21 tested chips is 100%.Thus,this method can provide technical support for chip security detection.(2)A FPGA configuration bitstream reverse technology is researchedFirst of all,a bitstream analysis model based on the Versa Tile structure is introduced.Then,based on this analytical mode,a bitstream control bit extraction method is studied.On this basis,a bitstream reverse method is researched,which can restore the logic function of a single Versa Tile from the bitstream.The experimental results show that this method is effective for the Microsemi FPGAs based on Flash architecture,and for Pro ASIC3 series A3P250 FPGAs.It can restore all combinational logic elements and sequential logic elements of a single Versa Tile.Thus,this method can provide technical support for chip security detection.