Accurate Analysis Method For FPGA Bitstream Mapping Relationships

With the development of science and technology,FPGA is used in more and more fields,involving every corner of people’s life,which makes its security risk more and more attention.Hardware Trojan have the characteristics of high concealment and strong destructiveness.Attackers can insert them into FPGA which can destroy the internal circuit function of FPGA,reduce the service life of FPGA and steal customer’s private information.Therefore,the detection of hardware Trojans is particularly important.However general users can only obtain bitstream files generated by FPGAs.Current Trojan detection methods can only detect circuits in the form of netlists and it is difficult to detect Trojans in these binary data.Thesis has conducted research on the bitstream mapping relationship of FPGA and successfully collected the control bits of FPGA internal resources.The specific content of thesis is as follows:(1)Thesis categorizes the internal basic resources of FPGA,elaborates on the testing methods of bit stream mapping relationship,and designs an automated control bit testing tool to collect the control bit sets of these resources.In addition,some special resources that cannot be applied by general testing methods are studied in thesis and new testing methods based on their characteristics are designed.When restoring the bitstream later,reverse tools restore the usage of FPGA internal resources by comparing mapping information and bitstream in the database.(2)A path testing method for logical resources is proposed in thesis,which can use the correlation between configuration element to solve the unary multi-valued problem of programmable logic points(PLP).Thesis successfully collected mapping relationship for some special paths by observing and recording the circuit states of logical resources in forward design.In the follow-up experiments,the feasibility of the method was verified by comparing the test circuits.(3)A feasible testing approach for black box logic resources whose circuit structure cannot be seen clearly is proposed in thesis and it successfully collects the mapping information.After studying the storage area of RAM resources,corresponding control bit information of each vector on the storage data expression is collected,and the relationship between the data expression and the initial value is analyzed.Finally,the feasibility of the above method and the accuracy of the collected information are verified through experiments.(4)For high-end FPGAs,such as Xilinx Vitrtex-5 series,the phenomenon of control bit multiplexing in logic resources is studied,and several feasible steps for screening and multiplexing control bits are proposed to improve the control bit set in reverse logic resources.